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TMPR3911 Datasheet(PDF) 159 Page - Toshiba Semiconductor |
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TMPR3911 Datasheet(HTML) 159 Page - Toshiba Semiconductor |
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159 / 462 page ![]() Chapter 5 SIU Module 5-5 5.2.4 Internal Function Registers Offset Read/Write Register 000 R/W Memory Configuration 0 004 R/W Memory Configuration 1 008 R/W Memory Configuration 2 00C R/W Memory Configuration 3 010 R/W Memory Configuration 4 014 W Memory Configuration 5 018 W Memory Configuration 6 01C W Memory Configuration 7 020 W Memory Configuration 8 028 R/W Video Control 1 02C W Video Control 2 030 W Video Control 3 034 W Video Control 4 038 W Video Control 5 03C W Video Control 6 040 W Video Control 7 044 W Video Control 8 048 W Video Control 9 04C W Video Control 10 050 W Video Control 11 054 W Video Control 12 058 W Video Control 13 05C W Video Control 14 060 W SIB Size 064 W SIB Sound Receive Start 068 W SIB Sound Transmit Start 06C W SIB Tel Receive Start 070 W SIB Tel Transmit Start 074 R/W SIB Control 078 R/W SIB Sound Holding Register 07C R/W SIB Tel Holding Register 080 R/W SIB SF0 Control 084 R/W SIB SF1 Control 088 R SIB SF0 Status 08C R SIB SF1 Status 090 R/W SIB DMA Control 0A0 R/W IR Control 1 0A4 W IR Control 2 0A8 W IR Holding Register 0B0 R/W UARTA Control 1 0B4 W UARTA Control 2 0B8 W UARTA DMA Control 1 0BC W UARTA DMA Control 2 0C0 R UARTA DMA Count 0C4 R/W UARTA Holding Register 0C8 R/W UARTB Control 1 0CC W UARTB Control 2 0D0 W UARTB DMA Control 1 0D4 W UARTB DMA Control 2 0D8 R UARTB DMA Count 0DC R/W UARTB Holding Register |
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