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TMPR3911 Datasheet(PDF) 224 Page - Toshiba Semiconductor

Part # TMPR3911
Description  32-Bit TX System RISC TX39 Family
PDF  462 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3911 Datasheet(HTML) 224 Page - Toshiba Semiconductor

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Chapter 9 I/O Module
9-6
As mentioned previously, each of the multi-function I/O ports can be independently programmed for
routing of signals for a standard/normal function to or from any given multi-function I/O port. Table
9.2.1 lists each of these standard functions for each multi-function I/O port. Note that depending on the
reset state for the respective MFIO Select Register bits, the pin function is configured either as a multi-
function port or as a standard function port.
Table 9.2.1 Multi-Function I/O Ports Versus Standard Functions
TMPR3911/12
pin
standard function
(I
= input, O = output)
multi-function
I/O port
multi-function select
(reset state)
CHIFS
CHIFS (I/O)
MIO[31]
MIOSEL[31] (1)
CHICLK
CHICLK (I/O)
MIO[30]
MIOSEL[30] (1)
CHIDOUT
CHIDOUT (O)
MIO[29]
MIOSEL[29] (1)
CHIDIN
CHIDIN (I)
MIO[28]
MIOSEL[28] (1)
DREQ*
DREQ* (I)
MIO[27]
MIOSEL[27] (0)
DGRNT*
DGRNT* (O)
MIO[26]
MIOSEL[26] (0)
BC32K
BC32K (O)
MIO[25]
MIOSEL[25] (1)
TXD
TXD (O)
MIO[24]
MIOSEL[24] (0)
RXD
RXD (I)
MIO[23]
MIOSEL[23] (0)
CS1*
CS1* (O)
MIO[22]
MIOSEL[22] (0)
CS2*
CS2* (O)
MIO[21]
MIOSEL[21] (0)
CS3*
CS3* (O)
MIO[20]
MIOSEL[20] (0)
MCS0*
MCS0* (O)
MIO[19]
MIOSEL[19] (1)
MCS1*
MCS1* (O)
MIO[18]
MIOSEL[18] (1)
MCS2*
MCS2* (O)
MIO[17]
MIOSEL[17] (1)
MCS3*
MCS3* (O)
MIO[16]
MIOSEL[16] (1)
SPICLK
SPICLK (O)
MIO[15]
MIOSEL[15] (0)
SPIOUT
SPIOUT (O)
MIO[14]
MIOSEL[14] (0)
SPIIN
SPIIN (I)
MIO[13]
MIOSEL[13] (0)
SIBMCLK
SIBMCLK (I/O)
MIO[12]
MIOSEL[12] (0)
CARDREG*
CARDREG* (O)
MIO[11]
MIOSEL[11] (1)
CARDIOWR*
CARDIOWR* (O)
MIO[10]
MIOSEL[10] (1)
CARDIORD*
CARDIORD* (O)
MIO[9]
MIOSEL[9] (1)
CARD1CSL*
CARD1CSL* (O)
MIO[8]
MIOSEL[8] (1)
CARD1CSH*
CARD1CSH* (O)
MIO[7]
MIOSEL[7] (1)
CARD2CSL*
CARD2CSL* (O)
MIO[6]
MIOSEL[6] (1)
CARD2CSH*
CARD2CSH* (O)
MIO[5]
MIOSEL[5] (1)
CARD1WAIT*
CARD1WAIT* (I)
MIO[4]
MIOSEL[4] (1)
CARD2WAIT*
CARD2WAIT* (I)
MIO[3]
MIOSEL[3] (1)
CARDDIR*
CARDDIR* (O)
MIO[2]
MIOSEL[2] (1)
MFIO[1]
(reserved)
MIO[1]
MIOSEL[1] (1)
MFIO[0]
(reserved)
MIO[0]
MIOSEL[0] (1)



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