 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMPR3911 Datasheet(PDF) 254 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMPR3911 Datasheet(HTML) 254 Page - Toshiba Semiconductor |
|
|
254 / 462 page  Chapter 11 Magicbus Module 11-14 11.4.3 Magicbus DMA Control 1 Register OFFSET = $0E8: write-only Bit Label RESET Read/Write 31-2 DMASTARTVAL[31:2] X W 1-0 Reserved DMASTARTVAL[31:2]: write-only These bits define the start address for the DMA buffer. 11.4.4 Magicbus DMA Control 2 Register OFFSET = $0EC: write-only Bit Label RESET Read/Write 31-20 Reserved 19-2 DMALENGTH[19:2] X W 1-0 Reserved DMALENGTH[19:2]: write-only These bits define the length of the DMA buffer. The last address in the DMA buffer is given by DMASTARTVAL[31:2] + DMALENGTH[19:2]. The value loaded into DMALENGTH should be equal to the desired buffer length −1. 11.4.5 Magicbus DMA Count OFFSET = $0F0: read-only Bit Label RESET Read/Write 31-20 Reserved 19-2 DMACNT[19:2] X R 1-0 Reserved DMACNT[19:2]: read-only These bits provide the status of the DMA counter. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
