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TMPR3911 Datasheet(PDF) 252 Page - Toshiba Semiconductor

Part # TMPR3911
Description  32-Bit TX System RISC TX39 Family
PDF  462 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3911 Datasheet(HTML) 252 Page - Toshiba Semiconductor

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Chapter 11 Magicbus Module
11-12
ENDMARX:
This bit enables the DMA receive function. This bit should not be set until the Magicbus DMA
Control 1 Register and Magicbus DMA Control 2 Register are setup and the module is enabled.
Only one of ENDMARX or ENDMATX can be set at a time since there is only one DMA channel.
ENDMATX:
This bit enables the DMA transmit function. This bit should not be set until the Magicbus DMA
Control 1 Register and Magicbus DMA Control 2 Register are setup, the module is enabled and the
empty flag is set. Only one of ENDMARX or ENDMATX can be set at a time since there is only
one DMA channel.
ENDMATEST:
This bit is used for IC testing and should not be set.
ENDMALOOP:
The DMA controller supports two modes, depending on the state of this bit. When
ENDMALOOP is a logic “0”, the DMA controller will stop executing when it reaches the end of
the DMA buffer. When ENDMALOOP is a logic “1”, the DMA controller will loop back to the
start of the DMA buffer when the end of the DMA buffer is reached and will continue operating.
LOOPBACK:
Setting this bit will cause the Magicbus Transmitter clock and data to be looped back into the
receive clock and data. The data is inverted when this mode is selected.
RCVPHAPOL:
Setting this bit will cause the Magicbus Receiver clock to be inverted.
DTIDLE:
This bit defines the value that the MBUSDATA pin will idle to in between transmitted
characters.
ENBYTEWAIT:
Setting this bit will cause a delay to be inserted between each byte in transmitted data. The
length of the delay is defined by the value in the DELAYVAL bits.
ENWORDWAIT:
Setting this bit will cause a delay to be inserted between each word in transmitted data. The
length of the delay is defined by the value in the DELAYVAL bits.
DETPHAPOL:
Setting this bit will cause the receive data pin to the Command Word clock to be inverted.
DETCLKPOL:
Setting this bit will cause the receive clock pin to the Command Word clear to be inverted.



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