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VNF1248F Datasheet(PDF) 49 Page - STMicroelectronics |
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VNF1248F Datasheet(HTML) 49 Page - STMicroelectronics |
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49 / 79 page ![]() Bit # Name Description The DE is a logical OR combination of errors related to device specific blocks: charge pump output undervoltage, NVM download failure. DE = CP_LOW or NVM_FAIL 25 OVC Overcurrent bit The OVC is a ‘real-time’ bit indicating an overcurrent event (programmed VOC_THRS_X overcome) 24 FS Fail-safe If the FS bit is set, the device was forced into a safe state. This bit is set in the fail-safe state (SR#1.FAILSAFE_ST = 1) FS = FAILSAFE_ST 12.11 RAM memory map Table 47. RAM memory map Address Name Access Content 01h Control register 1 R/W CR#1: 1st control register (CONTROLS) 02h Control register 2 R/W CR#2: 2nd control register (CONFIG 1) 03h Control register 3 R/W CR#3: 3rd control register (CONFIG 2) 04h Control register 4 R/W CR#4: 4th control register (NVM Programming) 05h Control register 5 R/W CR#5: 5th control register (CCM Configuration) 06h : 10h … R Reserved 11h Status register 1 R/C SR#1: 1st status register (DIAGNOSTICS + PROTECTIONS) 12h Status register 2 R SR#2: 2nd status register (CURRENT SENSE + NVM PROGRAMMING STATUS) 13h Status register 3 R SR#3: 3rd status register (NTC + TJ) 14h Status register 4 R SR#4: 4th status register (VOUT + VDS) 15h Status register 5 R/C SR#5: 5th status register (SELFTEST VDS) 16h Status register 6 R/C SR#6: 6th status register (SELFTEST STUCK ON) 17h Status register 7 R/C SR#7: 7th status register (SELFTEST CURRENT SENSE) 18h Status register 8 R SR#8: 8th status register (HSC) 19h … R Reserved Reserved 3Fh Advanced Operation Code C A R&C operation to this address causes all status registers to be cleared VNF1248F SPI functional description DS14109 - Rev 7 page 49/79 |
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