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VNF1248F Datasheet(PDF) 52 Page - STMicroelectronics |
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VNF1248F Datasheet(HTML) 52 Page - STMicroelectronics |
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52 / 79 page ![]() Bit Default Name Description If the current state is unlocked and S_T_CFG is not 000, then setting this bit causes a transition to -test state. This bit is automatically reset. 8 0 S_T_STOP When it is set to 1, stops execution of the selected-test (when it is applicable). This bit is automatically reset. 7:5 0x0 S_T_CFG Test selection: 000: No selection 001: Current sense 010: VDS detection 100: Power switch stuck-on 011: Current sense + VDS detection 101: Current sense + power switch stuck-on 110: VDS detection + power switch stuckon 111: Current sense + VDS detection + power switch stuck-on Others: Reserved 4 0 OUTCTL Enables high-side through SPI [1]: HS gate driver commanded on [0]: HS gate driver commanded off 3 0 BYPASSCTL Enables low current bypass through SPI: [1]: LCB commanded on [0]: LCB commanded off 2 0 Reserved 1 0 WD_TRIG Mirror of WD_TRIG bit 0 1 Parity bit Odd parity bit check Table 50. CR#2: control register 2 (read/write); address 02h Bit Default Name Description 23 ÷ 16 00000000 T_NOM Configures the value of nominal time required for the fuse emulation: tNOM (s) = b{T_NOM(7:0), 1} T_NOMmin = 00000000 → tNOM (s) = b000000001 = 1 s T_NOMmax = 11111111 → tNOM (s) = b111111111 = 511 s The nominal time corresponds to the trip time obtained when the current is equal to the nominal overcurrent threshold (OVC_THR). 15 ÷ 11 00000 OVC _THR Configures the value of the nominal overcurrent threshold. The threshold can be set in the range 6 mV to 90 mV See Table 19. Overcurrent protection. 10 ÷ 7 0000 HSC_THR Configures a threshold for hard short circuit latch-off. The threshold can be set in the range from 20 mV to 160 mV. See Table 18. Hard short circuit protection with integrated 10-bit ADC. 6 ÷ 2 00000 VDS_THRS Configures a threshold for external MOSFET desaturation shut-down. The threshold can be set in the range from 0.3 V to 1.80 V in steps of 50 mV (default = 300 mV). Configuration 0x1F is reserved. 1 0 WD_TRIG Mirror of WD_TRIG bit 0 Parity bit Odd parity bit check VNF1248F SPI functional description DS14109 - Rev 7 page 52/79 |
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