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VNF1248F Datasheet(PDF) 53 Page - STMicroelectronics |
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VNF1248F Datasheet(HTML) 53 Page - STMicroelectronics |
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53 / 79 page ![]() Table 51. CR#3: control register 3 (read/write); address 03h Bit Default Name Description 23:22 0x0 CS_UV_RETRY_T Current sense undervoltage fault clear auto retry time (only once) 00: 100 μs 01: 250 μs 10: 500 μs 11: 1 ms 21:20 0x0 Reserved 19:18 0x0 CCM_PWM_TON_MF Capacitive charge mode PWM ton multiplying factor 00: Ton x1 01: Ton x2 10: Ton x4 11: Ton x8 17 0x0 Reserved 16:14 0x0 CCM_VOUT_THR Capacitive charge mode VOUT threshold selection 000: 1 V 001: 2 V 010: 3 V 011: 4 V 1xx: 5 V 13:12 0x0 Reserved 11:10 0x0 UV_THR VS supply undervoltage threshold selection 0x: VS_USD1 10: VS_USD2 11: VS_USD3 9 0 UNLOCK [0]: bits GOSTBY, EN cannot be set to 1 but can be reset; [1]: bits GOSTBY, EN can be set to 1, but only with the next valid SPI frame. When UNLOCK = 1, it is automatically reset with the next valid SPI frame. 8:5 0x0 NTC_THR Configures a threshold for external MOSFET overtemperature shutdown. The threshold can be set in the range [110.92 : 37.50] mV. 4:3 0x0 WD_TIME 00: tWD = 50 ms 01: tWD = 100 ms 10: tWD = 150 ms 11: tWD = 200 ms 2 0 Reserved 1 0 WD_TRIG To keep the device in the unlocked state, this bit must be cyclically toggled within a period equal to tWD to refresh the watchdog. 0 1 Parity bit Odd parity bit check Table 52. CR#4: control register 4 (read/write); address 04h Bit Default Name Description Register function 1 23:2 0x0 NVM_CTM_ACCESS_KEY A specific word (0x105B96) to be written to have access to NVM programming control bits VNF1248F SPI functional description DS14109 - Rev 7 page 53/79 |
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