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VNF1248F Datasheet(PDF) 41 Page - STMicroelectronics

Part # VNF1248F
Description  High-side switch controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications
PDF  79 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF1248F Datasheet(HTML) 41 Page - STMicroelectronics

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11.5
Hard short circuit latch-off
The external MOSFET drain-source current is monitored by the control IC through the current sense amplifier,
which reads the voltage drop across a high-side shunt resistor. A hard short circuit shutdown of the MOSFET
occurs when the current sense voltage exceeds the preset threshold. In this case, both output stage and bypass
switch are turned off. The threshold can be set via SPI in the range from 20 mV to 160 mV, see Table 18 (the
parameters showed in the table are referred to the SAR converter at 10 bit).
The MOSFET is re-armed via SPI by clearing the HSC latched fault bit.
VHSC is converted by a dedicated ADC converter. The converted result is stored in the status register and can be
read via SPI.
This protection is not active in case the external MOSFET is in OFF state.
11.6
I2t vs time latch-off
The external MOSFET drain-source current is monitored by the control IC through the current sense amplifier,
which reads the voltage drop across a high-side shunt resistor. The overload detection circuitry emulates the
response of a traditional fuse. An overcurrent shutdown of the MOSFET occurs when the current sense voltage
exceeds the preset threshold for longer than the preset time. In this case, both output stages and bypass switch
are turned off. The threshold can be set via SPI in the range 6 mV to 90 mV, see the Table 19 (the parameters
showed in the table are referred to the SAR converter at 10-bit), while the nominal trip time can be programmed in
the range from 1 s to 511 s, (see timing: Table 50).
The MOSFET is re-armed via SPI by clearing the FUSE_LATCH latched fault bit. This protection is not active in
case the external MOSFET is in OFF state.
In case of hard short protection event occurrence, reported by the HSC flag bit, the FUSE_LATCH bit is set as
well.
11.7
Low current bypass desaturation shutdown
Internal bypass switch VDS voltage (VS - VOUT) is monitored by the IC, to protect the switch from load current
sink changes.
A desaturation shutdown of the bypass occurs when its VDS exceeds a fixed threshold (VDS_BYPASS_SAT); in
this situation, the bypass switch is turned off while the external FET is turned on through the HS_GATE output,
directly by the hardware, regardless of their software controlled bit status, to protect the bypass and provide the
requested current capability to the connected load.
This represents the so-called AUTO-ON event and it is flagged by bit #4 (AUTOON) of the global status byte that
corresponds to the BYPASS_SAT flag of the Table 54. SR#1: status register 1; address 11h.
The bypass switch can be re-armed through SPI control by clearing the BYPASS_SAT fault latched bit.
This protection is not active in case the bypass switch is in the OFF state.
A particular case is represented by standby wake-up event occurrence. The FSM passes from the Standby state
to the fail-safe state due to the bypass switch desaturation. In this situation, in addition to the shutdown of the
bypass switch and the turn on of the external FET, the DIAG pin of the device is driven low. This, to advise the
system of the autonomous woken up of the device, due to an hardware event (load current increase caused by
the desaturation of the bypass switch).
It is important to notice that the bypass switch cannot be used to charge any type of load, even those requesting
small currents capability. On the contrary, it shall be used to keep powered application loads, previously charged
by external FET, when they switch to low-power consumption modes (that is, standby).
11.8
Current sense undervoltage (shutdown)
Voltage level of ISNS_P pin is monitored by the IC in order to detect an undervoltage condition due to battery
drop. In this situation, IC is still able to work (if VS is decoupled from Vbat by external components) but external
FET monitoring circuitry could be affected if ISNS_P voltage falls below an internally defined threshold.
Thresholds voltage is derived by a configurable resistive divider.
VNF1248F
Protections
DS14109 - Rev 7
page 41/79



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