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VNF1248F Datasheet(PDF) 54 Page - STMicroelectronics

Part # VNF1248F
Description  High-side switch controller with intelligent fuse protection for 12 V, 24 V and 48 V automotive applications
PDF  79 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VNF1248F Datasheet(HTML) 54 Page - STMicroelectronics

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Bit
Default
Name
Description
Access to this field is allowed only after the UNLOCK bit is set to ‘1’
1
0
WD_TRIG
Mirror of WD_TRIG bit
0
1
Parity bit
Odd parity bit check
Register function 2: the following fields are enabled only if function 1 has been executed successfully
23:12
0x0
Reserved
11:8
0x0
NVM_ADDR
Address of NVM sector to be accessed. Only address 0x5 is available to
customer access.
7:4
0x0
Reserved
3
0
NVM_WR_EN
NVM operation type:
1: NVM sector data programming/write
0: NVM sector data read
2
0
NVM_OP_START
Trigger bit to start NVM operation
Write-only, read always 0
1
0
WD_TRIG
Mirror of WD_TRIG bit
0
1
Parity bit
Odd parity bit check
Table 53. CR#5: control register 5 (read/write); address 05h
Bit
Default
Name
Description
23:22
0x0
CCM_TIMEOUT
Capacitive load charge (burst mode) maximum time duration:
00: 200 ms
01: 250 ms
10: 300 ms
11: 400 ms
21:17
0x0
CCM_PWM_SC_T_NB
Capacitive load charge (burst mode) maximum number of lower frequency PWM
pulses for short circuit check (start phase)
Range: 5 to 50 pulses, variable step (refer to the Table 28.)
16:14
0x0
CCM_PWM_SC_T
Capacitive load charge (burst mode) time duration of PWM period during short
circuit check (start phase)
000: 2.0 ms
001: 2.5 ms
010: 3.0 ms
011: 3.5 ms
1 - -: 4.0 ms
13:8
0x0
CCM_PWM_TON
Capacitive load charge (burst mode) PWM Ton setting
Range: 1 to 50 μs, variable step (refer to the Table 27)
0x0 configuration: high-side driver controlled by protection only (hard short, fuse
latch)
7:2
0x0
CCM_PWM_T
Capacitive load charge (burst mode) PWM period during standard phase
Range: 50 to 4000 μs (refer to the Table 29)
1
0
WD_TRIG
Mirror of WD_TRIG bit
0
1
Parity bit
Odd parity bit check
VNF1248F
SPI functional description
DS14109 - Rev 7
page 54/79



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