VNF1248F datasheet(27/79 Pages) STMICROELECTRONICS

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In this state, internal bypass switch control is independent from DIN setting, only BYPASSCTL bit defines its

status; in case of user setting (DIN_CTRL_EN = ‘1’, DIN_CTRL_OPT = ‘1’), AND mode configuration, where DIN

is used to fast turn-off external power switch, it is recommended to set BYPASSCTL=0 accordingly, to avoid

BYPASS_SAT fault generation and, consequently, power switch automatically turned on again (overriding DIN

action).

6.3

Locked state

Output and bypass behavior according to DIN are the same as in unlocked state but, depending on device

configuration, DIN_CTRL_EN and DIN_CTRL_OPT settings are taken from:

•

Default configuration stored into NVM memory, if NVM_DEF_CFG_EN = 1

•

RAM configuration register fields, if NVM_DEF_CFG_EN = 0.

6.4

Fail-safe state

In this state DIN behavior is conditioned by the following programmable control register field:

•

FS_MODE[1:0] (CR#1): it defines three different modes for output channel and bypass switch management

in fail-safe; access to this control field is managed by unlock sequence;

–

FS_MODE = ‘00’/‘01’: output directly controlled by DIN; in this configuration, DIN_CTRL_EN control

field is accessible, through unlock sequence, to allow keeping DIN control active after fail-safe →

unlocked transition, avoiding holes in driving power switch

–

FS_MODE = ‘10’: last output state from unlocked/locked kept (same for bypass)

–

FS_MODE = ‘11’: output and bypass turned off

Table 25. Fail-safe state

BYPASS_SAT

bit

FS_MODE

[1:0]

DIN

input

OUTCTL

bit

BYPASSCTL

bit

Output

Bypass

DIAG

Off

Low

Refer to the Table 26

High/Low

Off

High/Low

Last state maintained

High/Low

Off

Low

6.5

DIN toggling

As mentioned above, DIN can be used to enable capacitive charging mode functionality (described in the

following section of this document), when device is in fail-safe state. To do that, a specific toggling sequence on

this input shall be executed, consisting of, 4 DIN pulses rising edges within a maximum time of tDIN_TOGGLE_TOUT,

after which sequence need to be restarted. Each pulse duration shall be tDIN_DEGLITCH < t < tDIN_RISE_FILTER,

where tDIN_RISE_FILTER represents the time interval after which DIN pulse is considered valid for driving directly

the external FET (capacitive charging mode not started).

The Table 11 reports timings of different DIN functionalities.

VNF1248F

DIN input management

DS14109 - Rev 7

page 27/79

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