VNF1248F datasheet(36/79 Pages) STMICROELECTRONICS

36 / 79 page

Figure 12. NVM write operation

Unlocked

NVM-mapped user

registers write

UNLOCK bit write

(CR#3)

User key write

(CR#4)

User sector

write programming

(CR#4)

NVM write

device operation

User operation

status read

(SR#2)

Completed

Not completed

Aborted

Yes

For what concerns NVM read execution, the steps are the following:

1. User reset (by writing 0) target RAM register fields (optional)

2. The user writes, through SPI, the required 2-steps access sequence

3. User writes, through SPI, sector address, access type and start command in the unlocked dedicated register

(CR#4)

4. Digital control logic provides controls and address to NVM interface IP

5. NVM IP interface handles NVM memory IP reading procedure

6. NVM IP interface notifies reading phase completion to digital logic

7. Digital control logic maps sector data output to respective RAM register fields

8. User reads (and clear), through SPI, RAM register field reporting NVM operation status

The user reads through SPI, RAM register fields corresponding to addressed device parameters.

Figure 13. NVM read operation

Unlocked

UNLOCK bit write

(CR#3)

User key write

(CR#4)

User sector

read programming

(CR#4)

NVM read

device operation

User operation

status read

(SR#2)

Completed

Not completed

Aborted

Yes

NVM-mapped user

registers clear

(opt.)

NVM-mapped user

registers read

VNF1248F

Non-volatile memory (NVM) customer programming

DS14109 - Rev 7

page 36/79

VNF1248F Datasheet(PDF) 36 Page - STMicroelectronics

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