TAS2120 datasheet(24/113 Pages) TI2

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switching, power down analog and digital blocks to ensure no power down pop and finally put the device into

Hardware Shutdown mode. I2C communication is disabled while the SDZ pin is asserted low in this mode.

If configured in SDZ_MODE[1:0] = 01, when the SDZ pin is asserted low the device will immediately enter the

hardware shutdown and will not go through any power-down sequencing routine. It is recommended to ensure

that the audio input signal is ramped down to the idle channel before asserting the SDZ pin low in this mode,

device software mute mode can be used to realize this. I2C communication is disabled while the SDZ pin is

asserted low in this mode.

Finally, the device can be configured to Software shutdown mode by setting SDZ_MODE[1:0] = 10. In this

mode, when the SDZ pin is pulled low, the device will follow normal power-down sequencing and enter software

shutdown mode. All the device register configuration programmed is retained as is from the state the device was

in before the SDZ pin was pulled low. I2C communication is still available while the SDZ pin is asserted low in

this mode.

Table 6-1. Shutdown Control

SDZ_MODE[1:0]

Configuration

00 (default)

Hardware shutdown mode with

power-down sequencing

Hardware shutdown mode -

immediate

Software shutdown mode (All

Reserved

When SDZ_MODE[1:0] is 00 or 10, the device goes through shutdown sequencing and the SDZ pin must be

held low for the entire duration of the shutdown time. The shutdown time is specified in the Power up/down

Time section of the Electrical Characteristics section. When SDZ is released, the device will sample relevant

configuration and address pins then enter software shutdown mode.

6.3.1.2 Hardware Config Modes

The TAS2120 device can operate in a Pin control based HW Mode depending on the resistor terminations used

for Select Pin1 to Select Pin5. Pin control based HW Mode behavior of the device is designed to simplify device

configuration without using any software based configurations through I2C communication.

Table 6-2. Select Pin Functionalities

Select Pin Name

Functionality

SEL1

Amplifier gain setting with volume

ramp enable/disable option

SEL2

I2S, TDM, Left justified selection

SEL3

Data valid rising/falling edge

selection

SEL4

Y-bridge threshold configuration

SEL5

Supply voltage mode selection

Table 6-3. SEL1 HW Mode configuration

SEL1 Connection

Amplifier Gain

Volume Ramp

Direct Short to GND

Configured through

I2C

Configured through

I2C

1.2kΩ to GND

6 dBV

Disabled

1.2kΩ to VBAT

12 dBV

Disabled

5kΩ to GND

18 dBV

Disabled

330Ω to VBAT

21 dBV

Disabled

5kΩ to VBAT

6 dBV

Enabled

TAS2120

SLASFC6A – AUGUST 2024 – REVISED AUGUST 2025

www.ti.com

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