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TAS2120 Datasheet(PDF) 92 Page - Texas Instruments |
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TAS2120 Datasheet(HTML) 92 Page - Texas Instruments |
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92 / 113 page ![]() 7.8 PAGE 7 Registers Table 7-133 lists the memory-mapped registers for the PAGE 7 registers. All register offset addresses not listed in Table 7-133 should be considered as reserved locations and the register contents should not be modified. Table 7-133. PAGE 7 Registers Address Acronym Description Section 0h PAGE Device Page Section 7.8.1 30h DEV_PERF_TUNING_17 Device performance Tuning Section 7.8.2 44h CLASSH_TUNING_15 ClassH Tuning register Section 7.8.3 78h DEV_PERF_TUNING_21 Device performance Tuning Section 7.8.4 7Ch DEV_PERF_TUNING_05 Device performance Tuning Section 7.8.5 7.8.1 PAGE Register (Address = 0h) [Reset = 00h] Return to the Summary Table. The devices memory map is divided into pages and books. This register sets the page. Table 7-134. PAGE Register Field Descriptions Bit Field Type Reset Description 7-0 PAGE[7:0] R/W 0h Sets the device page. 0h = Page 0 1h = Page 1 FFh = Page 255 7.8.2 DEV_PERF_TUNING_17 Register (Address = 30h) [Reset = 0E9DDFh] Return to the Summary Table. Device performance Tuning Table 7-135. DEV_PERF_TUNING_17 Register Field Descriptions Bit Field Type Reset Description 23-0 DEV_PERF_TUNING_17[ 23:0] R/W E9DDFh Addresses 0x30 to 0x32 are combined. Can be configured using the PPC3 Software. 7.8.3 CLASSH_TUNING_15 Register (Address = 44h) [Reset = 580000h] Return to the Summary Table. ClassH Tuning register Table 7-136. CLASSH_TUNING_15 Register Field Descriptions Bit Field Type Reset Description 23-0 CLASSH_TUNING_15[23: 0] R/W 580000h Addresses 0x44 to 0x46 are combined. Can be configured using the PPC3 Software. 7.8.4 DEV_PERF_TUNING_21 Register (Address = 78h) [Reset = 000070h] Return to the Summary Table. Device performance Tuning TAS2120 SLASFC6A – AUGUST 2024 – REVISED AUGUST 2025 www.ti.com 92 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TAS2120 |
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