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TAS2120 Datasheet(PDF) 71 Page - Texas Instruments |
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TAS2120 Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 113 page  7.2 PAGE 1 Registers Table 7-52 lists the memory-mapped registers for the PAGE 1 registers. All register offset addresses not listed in Table 7-52 should be considered as reserved locations and the register contents should not be modified. Table 7-52. PAGE 1 Registers Address Acronym Description Section 0h PAGE Device Page Section 7.2.1 Ah BOOST_TUNING_12 Boost configuration Section 7.2.2 Eh DEV_PERF_TUNING_07 Device performance tuning register Section 7.2.3 18h PVDD_OVLO1 PVDD Over voltage Section 7.2.4 19h DEVICE_CFG0 Device configuration Section 7.2.5 1Ah PVDD_OVLO2 PVDD Over voltage Section 7.2.6 29h DEVICE_CFG2 Device configuration Section 7.2.7 2Bh DEV_PERF_TUNING_04 Device performance Tuning register Section 7.2.8 64h I2C_CKSUM I2C Checksum Section 7.2.9 7.2.1 PAGE Register (Address = 0h) [Reset = 00h] Return to the Summary Table. The device's memory map is divided into pages and books. This register sets the page. Table 7-53. PAGE Register Field Descriptions Bit Field Type Reset Description 7-0 PAGE[7:0] R/W 0h Sets the device page. 0h = Page 0 1h = Page 1 FFh = Page 255 7.2.2 BOOST_TUNING_12 Register (Address = Ah) [Reset = 98h] Return to the Summary Table. Boost configuration Table 7-54. BOOST_TUNING_12 Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R/W 2h Reserved 5-2 BOOST_TUNING_12[3:0] R/W 6h Boost tuning register. Can be configured using the PPC3 software 1 RESERVED R 0h Reserved 0 RESERVED R 0h Reserved 7.2.3 DEV_PERF_TUNING_07 Register (Address = Eh) [Reset = 0Bh] Return to the Summary Table. Device performance tuning register Table 7-55. DEV_PERF_TUNING_07 Register Field Descriptions Bit Field Type Reset Description 7-6 RESERVED R/W 0h Reserved 5-4 RESERVED R/W 0h Reserved www.ti.com TAS2120 SLASFC6A – AUGUST 2024 – REVISED AUGUST 2025 Copyright © 2025 Texas Instruments Incorporated Submit Document Feedback 71 Product Folder Links: TAS2120 |
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