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TAS2120 Datasheet(PDF) 64 Page - Texas Instruments |
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TAS2120 Datasheet(HTML) 64 Page - Texas Instruments |
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64 / 113 page  7.1.35 CLASSD_CFG_02 Register (Address = 32h) [Reset = 9Ch] Return to the Summary Table. This register configures the class-D amplifier. Table 7-36. CLASSD_CFG_02 Register Field Descriptions Bit Field Type Reset Description 7 EN_Y_BRIDGE_MODE R/W 1h Enable/Disable VDD Bridge mode during device operation 0h = VDD Bridge mode disabled 1h = VDD Bridge mode enabled 6 RESERVED R/W 0h Reserved 5-4 RESERVED R/W 1h Reserved 3-2 Ybridge_hyst_timer[1:0] R/W 3h Time hysteresis programability 0h = 100 us 1h = 500 us 2h = 5 ms 3h = 50 ms 1-0 RESERVED R 0h Reserved 7.1.36 BST_CFG_05 Register (Address = 3Bh) [Reset = E3h] Return to the Summary Table. This register configures internal Boost controller. Table 7-37. BST_CFG_05 Register Field Descriptions Bit Field Type Reset Description 7-0 VBOOST_MAX_CTRL[7:0 ] R/W E3h Boost VMAX setting in class-H mode. 54h = 5.54V (Min setting) E5h = 15.11V (Max setting) 7.1.37 THERM_CFG Register (Address = 3Ch) [Reset = 00h] Return to the Summary Table. This register configures thermal warning detection. Table 7-38. THERM_CFG Register Field Descriptions Bit Field Type Reset Description 7-1 RESERVED R 0h Reserved 0 EN_THERM_WARN_DET R/W 0h Enable control for thermal warning detection feature. 0h = Disabled 1h = Enabled 7.1.38 INT_MASK_0 Register (Address = 5Bh) [Reset = 03h] Return to the Summary Table. This register configures Masks for Interrupt flags. Table 7-39. INT_MASK_0 Register Field Descriptions Bit Field Type Reset Description 7 INT_MASK0[7] R/W 0h Mask for Interrupt due to BOP Inf Hold flag. 0h = Don't Mask 1h = Mask TAS2120 SLASFC6A – AUGUST 2024 – REVISED AUGUST 2025 www.ti.com 64 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TAS2120 |
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