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TAS2120 Datasheet(PDF) 62 Page - Texas Instruments |
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TAS2120 Datasheet(HTML) 62 Page - Texas Instruments |
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62 / 113 page  This register configures Boost controller. Table 7-28. BST_CFG_03 Register Field Descriptions Bit Field Type Reset Description 7-5 RESERVED R/W 2h Reserved 4-3 RESERVED R/W 1h Reserved 2 RESERVED R/W 0h Reserved 1 External_boost_classh_en R/W 0h Support for external_boost PWM control 0h = Disabled 1h = Enabled 0 Sel_pwm_out_polarity R/W 0h External_boost PWM control polarity 0h = Default 1h = Inverted 7.1.28 INTERRUPT_CFG1 Register (Address = 25h) [Reset = 00h] Return to the Summary Table. This register clears all the latched interrupt registers. Table 7-29. INTERRUPT_CFG1 Register Field Descriptions Bit Field Type Reset Description 7 Shared_boost_primary_en R/W 0h Primary device control in shared boost mode 0h = Disabled 1h = Enabled 6 Shared_boost_secondary _en R/W 0h Secondary device control in shared boost mode 0h = Disabled 1h = Enabled 5-2 RESERVED R 0h Reserved 1 INT_CLR_LTCH R/W 0h Clear INT_LTCH registers. 0h = Don't clear 1h = Clear 0 RESERVED R 0h Reserved 7.1.29 SAR_MONITOR_01 Register (Address = 26h) [Reset = 00h] Return to the Summary Table. This register provides sensed VBAT Voltage. Table 7-30. SAR_MONITOR_01 Register Field Descriptions Bit Field Type Reset Description 7-0 VBAT_CNV_MSB[7:0] R 0h Returns the SAR ADC VBAT monitored voltage MSBs. VBAT value converted is based on selection of SEL_VBAT_MODE 7.1.30 SAR_MONITOR_02 Register (Address = 27h) [Reset = 00h] Return to the Summary Table. This register provides sensed VBAT Voltage. Table 7-31. SAR_MONITOR_02 Register Field Descriptions Bit Field Type Reset Description 7-4 VBAT_CNV_LSB[3:0] R 0h Returns the SAR ADC VBAT monitored voltage LSBs. VBAT value converted is based on selection of SEL_VBAT_MODE TAS2120 SLASFC6A – AUGUST 2024 – REVISED AUGUST 2025 www.ti.com 62 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TAS2120 |
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