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MP3924 Datasheet(PDF) 31 Page - Monolithic Power Systems

Part # MP3924
Description  Quad-Port, IEEE 802.3af/at PSE Controller for Power over Ethernet
PDF  56 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP3924 Datasheet(HTML) 31 Page - Monolithic Power Systems

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MP3924
– QUAD-PORT IEEE 802.3AF/AT PSE CONTROLLER
MP3924 Rev. 1.0
MonolithicPower.com
31
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
Addr
Register
Type
D7
D6
D5
D4
D3
D2
D1
D0
Reset State
2Dh
OVER_LOAD_
STATUS
R
OCUT4
OCUT3
OCUT2
OCUT1
STF4
STF3
STF2
STF1
0000 0000
2Eh
R/C
(12)
2Fh
CURRENT_LIMIT_
STATUS
R
-
-
-
-
OLIM4
OLIM3
OLIM2
OLIM1
0000 0000
30h
R/C
(12)
31h
DISCONNECT_
STATUS
R
-
-
-
-
DCDIS
4
DCDIS3
DCDIS2
DCDIS1
0000 0000
32h
R/C
(12)
33h
WATCHDOG_
STATUS
R
-
-
-
-
-
-
-
WDS
0000 0000
34h
PIN_STATUS
R
-
-
-
AUTO
A3
A2
A1
A0
000A DDDD
(11)
35h
LEGACY_
DETECT_
RESULT1
R
LEGDET2
LEGDET1
0000 0000
36h
LEGACY_
DETECT_
RESULT2
R
LEGDET4
LEGDET3
0000 0000
ADC Results Register
40h
PORT_1_
CURRENT
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
41h
R
Bit[8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
42h
OUT1_PIN_
VOLTAGE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
43h
R
Bit[8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
44h
PORT_2_
CURRENT
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
45h
R
Bit[8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
46h
OUT2_PIN_
VOLTAGE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
47h
R
Bit[8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
48h
PORT_3_
CURRENT
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
49h
R
Bit[8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
4Ah
OUT3_PIN_
VOLTAGE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
4Bh
R
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
4Ch
PORT_4_
CURRENT
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
4Dh
R
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
4Eh
OUT4_PIN_
VOLTAGE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
4Fh
R
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
50h
INPUT_VOLTAGE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
51h
R
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
52h
JUNCTION_
TEMPERATURE
R
-
-
-
-
-
-
-
Bit [0]
0000 0000
53h
R
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
0000 0000
54h
PMAX_POWER_
SETTING
R/W
-
-
-
-
-
-
-
Bit [0]
0000 000P
55h
R/W
Bit [8]
Bit [7]
Bit [6]
Bit [5]
Bit [4]
Bit [3]
Bit [2]
Bit [1]
PPPP PPPP
(11)
60h
DIE_ID
R
FAB
MAJOR
_REV
MINOR
_REV
VENDO
R_ID
0000
0000
-
-
-
-
Notes:
11)
“A” represents the AUTO pin’s status during start-up. “M” represents the MID pin’s status during start-up. “C” represents CLS5 pin’s status
during start-up.
“D” represents the A3~A0 address pin statuses during start-up. “P” represents the PMAX pin setting ADC results during
start-up.
12) R/C is read and clear address. Reading R/C clears the bit status after reading is complete.



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