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MP3924 Datasheet(PDF) 5 Page - Monolithic Power Systems

Part # MP3924
Description  Quad-Port, IEEE 802.3af/at PSE Controller for Power over Ethernet
PDF  56 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP3924 Datasheet(HTML) 5 Page - Monolithic Power Systems

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MP3924
– QUAD-PORT IEEE 802.3AF/AT PSE CONTROLLER
MP3924 Rev. 1.0
MonolithicPower.com
5
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
PIN FUNCTIONS (continued)
Pin #
Name
Description
15
A2
MP3924 address setting pin. Connect A2 to VCC or DGND to set the lower 4-bit address
bits (Address = 010 A3 A2 A1 A0). The address signal is latched when the device starts up
or is reset. A2 is internally pulled up to VCC through a 50k
Ω resistor (an external 10kΩ
resistor can be added).
16
A3
MP3924 address setting pin. Connect A3 to VCC or DGND to set the lower 4-bit address
bits (Address = 010 A3 A2 A1 A0). The address signal is latched when the device starts up
or is reset. A3 is internally pulled up to VCC through a 50k
Ω resistor (an external 10kΩ
resistor can also be added).
17
DGND
Ground of the internal digital and analog circuit.
18
SGND2
Current sense negative input for port 3 and port 4. Connect SGND2 to the low-side
terminal of the sense resistor. For an accurate current sense, use a Kelvin connection
when connecting SGND2 to the PCB. Connect SGND2 to DGND if not used.
19
PGND
Ground of input power supply.
20
VCC
3.3V internal regulator output for analog and digital circuit supply. A minimum 1µF
ceramic capacitor must be placed between VCC and DGND.
21
PMAX
Maximum loading power setting pin. Connect one resistor from the PMAX pin to DGND
to set the total power capability on all four output ports. The MP3924 limits the total power
on all four ports below this set limit. The PMAX setting signal is latched when the device
starts up or is reset.
22
VIN
Power supply input for both VCC and output ports. Bypass VIN with at least one
0.1µF/100V ceramic capacitor, placed between VIN and PGND.
23
SENSE4
Current-sense pin from the high-side sense resistor terminal for port 4. It is
recommended to use a
0.25Ω sense resistor for all applications. For an accurate current
sense, use a Kelvin connection when connecting SENSE4 during PCB layout. Connect
SENSE4 to DGND if not used.
24
GATE4
MOSFET gate driver for port 4. Float the GATE4 pin if not used.
25
OUT4
Output voltage sense pin for port 4. Connect OUT4 to the return of the output interface
for detecting, classifying, voltage sensing, and current limit foldback control. Float the
OUT4 pin if not used.
26
SENSE3
Current-sense pin from the high-side sense resistor terminal for port 3. It is
recommended to use a
0.25Ω sense resistor for all applications. For an accurate current
sense, use a Kelvin connection when connecting SENSE3 during PCB layout. Connect
SENSE3 to DGND if not used.
27
GATE3
MOSFET gate driver for port 3. Float the GATE3 pin if not used.
28
OUT3
Output voltage sense pin for port 3. Connect OUT3 to the return of the output interface
for detecting, classifying, voltage sensing, and current limit foldback control. Float the
OUT3 pin if it is not used.
29
SENSE2
Current-sense pin from the high-side sense resistor terminal for port 2. It is
recommended to use a
0.25Ω sense resistor for all applications. For an accurate current
sense, use a Kelvin connection when connecting SENSE1 during PCB layout. Connect
SENSE1 to DGND if not used.
30
GATE2
MOSFET gate driver for port 2. Float the GATE2 pin if not used.
31
OUT2
Output voltage sense pin for port 2. Connect OUT2 to the return of the output interface
for detecting, classifying, voltage sensing, and current limit foldback control. Float the
OUT2 pin if it is not used.
32
SENSE1
Current-sense pin from the high-side sense resistor terminal for port 1. It is
recommended to use a
0.25Ω sense resistor for all applications. For an accurate current
sense, use a Kelvin connection when connecting SENSE1 during PCB layout. Connect
SENSE1 to DGND if not used.



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