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MP3924 Datasheet(PDF) 7 Page - Monolithic Power Systems |
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MP3924 Datasheet(HTML) 7 Page - Monolithic Power Systems |
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7 / 56 page ![]() MP3924 – QUAD-PORT IEEE 802.3AF/AT PSE CONTROLLER MP3924 Rev. 1.0 MonolithicPower.com 7 7/16/2021 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2021 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS VIN = 54V, PGND, DGND, SGND1, and SGND2 are connected together, RSENSE = 0.25Ω, TJ = -40°C to +125°C (6), typical value is tested at TJ = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Power Supply Input under-voltage lockout (UVLO) VIN_UVLO VIN rising 28 29.5 31 V Input UVLO hysteresis VIN_UVLO_HYS 2.7 V Input over-voltage lockout (OVLO) VIN_OVP VIN rising 62 65 68 V Input OVLO hysteresis VIN_OVP_HYS 2.8 V Input OVP lockout delay (7) 100 µs Input power okay threshold VIN_OK VIN rising 38 40 42 V Input power okay hysteresis VIN_OK_HYS 0.7 V EN logic high voltage VHI 2.5 V EN logic low voltage VLI 0.4 V EN input current Pull EN to 0V, 3.3V 0 µA EN turn on/off delay tEN_ON EN pin high pulse duration for start-up or low-pulse duration for shutdown 150 µs tEN_OFF 120 Supply current IIN Logic pin is floating, no connection for all output ports, AUTO = low 2 4 mA Shutdown current ISD EN = 0V 150 µA VCC regulation VCC Load = 0mA 3.3 V Load = 15mA 3.2 VCC UVLO VCC_UVLO VCC rising 2.3 2.5 2.7 V VCC UVLO hysteresis VCC_UV_HYS 170 mV VCC current limit VCC = DGND 17 mA Power-on reset (POR) delay tPOR From VCC on to detection 0.5 ms Detection First detection voltage VDET1 Test the VIN to OUTx pins 3.6 4 V Second detection voltage VDET2 Test the VIN to OUTx pins 7.2 8 V Detection voltage slew rate VSLEW CDET = 0.1µF 0.02 V/µs Detection current limit IDET_LIMIT Short VIN to OUTx 1 1.2 1.5 mA Short-circuit detection threshold VSC First detection voltage 1 1.5 1.8 V Open-circuit current threshold IOPEN 10 15 25 µA |
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