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MP3924 Datasheet(PDF) 8 Page - Monolithic Power Systems

Part # MP3924
Description  Quad-Port, IEEE 802.3af/at PSE Controller for Power over Ethernet
PDF  56 Pages
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP3924 Datasheet(HTML) 8 Page - Monolithic Power Systems

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MP3924
– QUAD-PORT IEEE 802.3AF/AT PSE CONTROLLER
MP3924 Rev. 1.0
MonolithicPower.com
8
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS (continued)
VIN = 54V, PGND, DGND, SGND1, and SGND2 are connected together, RSENSE = 0.25Ω,
TJ = -40°C to +125°C (6), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
Minimum valid detection
resistance
RGOODL
15
17
19
kΩ
Maximum valid detection
resistance
RGOODH
26.5
30
33
kΩ
Maximum valid capacitance
CGOOD_MAX
1
9
µF
Detection time
tDET
Second detection phase
280
310
ms
Detection reset time
tRESET
Port reset by internal
discharge between VIN and
OUTx before detection starts
80
100
ms
Midspan mode detection
delay
tMIDDLY
Re-detection interval, MID = 1
2.8
sec
Power removal detection
delay
tREMDLY
Re-detection after one power
removal event due to error
condition (ICUT, ILIM,
INRUSH), fault timer = 60ms
MID = 0, automatic and semi-
automatic mode
0.8
0.96
1.12
sec
Classification
Classification output voltage
VCLS
Test VIN to OUTx pins during
classification, load < 60mA
16
18
20
V
Classification current limit
ICLS_ILIM
Short VIN to OUTx
70
mA
Class event time
tCLE
8
15
22
ms
Mark event voltage
VMARK
Test VIN to OUTx pins
7.6
8.8
9.8
V
Mark event current limit
IMARK_ILIM
Short VIN to OUTx
6
10
14
mA
Mark event time
tME
6.5
9
11
ms
Classification current
threshold
ICLS
Class 0 to 1
5.5
6.5
7.5
mA
Class 1 to 2
13.5
14.5
15.5
mA
Class 2 to 3
21.5
23
24.5
mA
Class 3 to 4
31.5
33
34.5
mA
Class 4 to over-current (OC)
condition (or Class 5 (8))
45.5
48
50.5
mA
Port start-up delay
tPON
Automatic mode from
detection ending to power
port above 21V
100
ms
Manual mode, from command
to output port above 21V
3
ms
Port shutdown delay
From command off to gate <
1V
0.5
ms
Start-up sequence delay (9)
From one channel detection
to the next channel detection
if the first channel powers up
in automatic mode
0.5
sec



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