XC2000 datasheet(106/729 Pages) INFINEON

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XC2000 Derivatives

Peripheral Units (Vol. 2 of 2)

Analog to Digital Converter

Preliminary

User’s Manual

16-12

V1.0, 2007-06

ADC, UM_V0.1D6

a fast external blocking capacitor CEXT at the analog input pin of the ADC. Like this,

mainly CEXT delivers the charge during the sample phase. This structure allows a

significantly shorter sample phase than without a blocking capacitor, because the low-

pass time constant defining the sample time is mainly given by the values of

RAIN and

CAIN.

Additionally, the capacitor CAIN is automatically precharged to a voltage of approximately

the half of the standard reference voltage

VAREF to minimize the average difference

between VAINx and VC at the beginning of a sample phase. Due to varying parameters

and parasitic effects, the precharge voltage of

CAIN is typically smaller than VAREF /2.

On the other hand, the charge redistribution between CEXT and CAIN leads to a voltage

change of VAINx during the sample phase. In order to keep this voltage change lower

than 1 LSBn, it is recommended to use an external blocking capacitor CEXT in the range

of at least 2n

× C

AIN.

The resulting low-pass filter of REXT and CEXT should be dimensioned in a way to allow

VAINx to follow VS between two sample phases of the same analog input channel.

Please note that, especially at high temperatures, the analog input structure of an ADC

can lead to a leakage current and introduces an error due to a voltage drop over REXT.

The ADC input leakage current increases if the input voltage level is close to the analog

supply ground

VSS or to the analog power supply VDDPA. It is recommended to use an

operating range for the input voltage between approximately 3% and 97% of

VDDPA to

reduce input leakage values.

Furthermore, the leakage is influenced by an overload condition at adjacent analog

inputs. During an overload condition, an input voltage exceeding the supply range is

applied at an input and the built-in protection circuit limits the resulting input voltage. This

leads to an overload current through the protection circuit that is translated (by a coupling

factor) into an additional leakage at adjacent inputs.

16.1.8.2

Reference Path

During the conversion phase, parts of the capacitor field

CAIN are switched to a reference

input or to VAGND. The ADC kernel supports two possible reference inputs, VAREF as

standard reference and CH0 as alternative reference. The reference selection between

both possibilities is handled individually for each analog input channel. For example, this

structure allows conversions of 5 V and 3.3 V based analog input signals with the same

ADC kernel.

A high accuracy of the conversion results requires a stable and noise-free reference

voltage and analog supply voltages during the conversion phase. Instable voltages or

noise on the supply or reference inputs lead to a reduced conversion accuracy. Please

note that noise can also be introduced into the ADC module by other modules, e.g. by

switching of neighboring pins. It is strongly recommended to carefully decouple analog

from digital signal domains.

Due to the switching of parts of

CAIN, the ADC requires a dynamic current at the selected

reference input. Thus, the impedance

RAREF of the reference voltage source VR has to

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