R8CSLASH15 datasheet(136/277 Pages) RENESAS

136 / 277 page

R8C/14 Group, R8C/15 Group

13. Timers

Rev.2.10

Jan 19, 2006

Page 124 of 253

REJ09B0164-0210

Figure 13.31

Operating Example in Output Compare Mode

Set value in TM1 register

0000h

Count start

Match

Time

TCC00 bit in

TCC0 register

“1”

“0”

IR bit in CMP0IC

“1”

“0”

TCC12 bit in TCC1 register = 1 (TC register is set to “ 0000h” at Compare 1 match occurrence )

TCC13 bit in TCC1 register = 1 (Compare 0 output selected)

TCC15 to TCC14 bits in TCC1 register = 11b (CMP output level is set to high at Compare 0 match occurrence)

TCC17 to TCC16 bits in TCC1 register = 10b (CMP output level is set to low at Compare 1 match occurrence)

TCOUT6 bit in TCOUT register = 0 (not reversed)

TCOUT7 bit in TCOUT register = 1 (reversed)

TCOUT0 bit in TCOUT register = 1 (CMP0_0 output enabled)

TCOUT3 bit in TCOUT register = 1 (CMP1_0 output enabled)

P1_0 bit in P1 register = 1 (high)

P3_0 bit in P3 register = 1 (high)

Set to "1" by program

IR bit in CMP1IC

“1”

“0”

Set value in TM0 register

Match

CMP0_0 output

“1”

“0”

“1”

“0”

CMP1_0 output

Set to “0” when interrupt request is accepted, or set by program

Set to “0” when interrupt request is

accepted, or set by program

Conditions :

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