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32182 Datasheet(PDF) 36 Page - Renesas Technology Corp

Part # 32182
Description  32-BIT RISC SINGLE-CHIP MICROCOMPUTER M32R FAMILY / M32R/ECU SERIES
PDF  755 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

32182 Datasheet(HTML) 36 Page - Renesas Technology Corp

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1
1-9
OVERVIEW
32182 Group User’s Manual (Rev.1.0)
1.3 Pin Functions
Table 1.3.1 Description of Pin Functions (1/5)
Type
Pin Name
Signal Name
Input/Output Description
Power supply
VCCE
Main power supply
–
Power supply for the device (5.0 V ± 0.5 V or 3.3 V ± 0.3 V).
EXCVCC
Internal power supply –
This pin connects an external capacitor.
VCC-BUS
Bus power supply
–
Power supply for the bus control pins (5.0 V ± 0.5 V or 3.3 V
± 0.3 V).
VDDE
RAM power supply
–
Backup power supply for the internal RAM (5.0 V ± 0.5 V or
3.3 V ± 0.3 V).
EXCVDD
Internal power
–
This pin connects an external capacitor for the internal power
supply of RAM
supply of the internal RAM.
VSS
Ground
–
Connect all VSS pins to ground (GND).
Clock
XIN,
Clock input
Input
These are clock input/output pins. A PLL-based ×8 frequency
XOUT
Clock output
Output
multiplier is included, which accepts as input a clock whose
frequency is 1/8 of the internal CPU clock frequency. (XIN
input is 10 MHz when f(CPUCLK) = 80 MHz.)
BCLK
System clock
Output
This pin outputs a clock whose frequency is twice that of the
external input clock (XIN). (BCLK output is 20 MHz when
f(CPUCLK) = 80 MHz.) Use this clock to synchronize the
operation of external devices.
OSC-VCC
Clock power supply
–
Power supply for the oscillator circuit. Connect OSC-VCC to
the main power supply.
OSC-VSS
Clock ground
–
Connect OSC-VSS to ground.
VCNT
PLL control
–
Connect a resistor and capacitor for control of the PLL circuit.
Reset
RESET#
Reset
Input
Reset input pin for the internal circuit.
Mode
MOD0,
Mode
Input
Set the microcomputer’s operation mode.
MOD1
MOD0
MOD1
Mode
0
0
Single-chip mode
0
1
External extension mode
1
0
Processor mode
(Boot mode) (Note 1)
1
1
(Settings inhibited)
Flash protect
FP
Flash protect
Input
This special pin protects the flash memory against rewrites
in hardware.
Address bus
A11–A30
Address bus
Output
Twenty address lines (A11–A30) are included that support
up to 2 MB of memory space per chip select. However, A11
and A12 are shared with CS#2 and CS#3, respectively.
A31 is not output.
Note 1: Boot mode requires that the FP pin should be at the high level. For details about boot mode, see Chapter 6, “Internal
Memory.”



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