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7480 Datasheet(PDF) 262 Page - Renesas Technology Corp |
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7480 Datasheet(HTML) 262 Page - Renesas Technology Corp |
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262 / 337 page ![]() 7480 Group and 7481 Group User's Manual 2-47 APPLICATIONS 2.10.2 Functions Revised from 7477 Group and 7478 Group The functions of 7480 Group and 7481 Group whose specifications are revised from those of the 7477 Group and 7478 Group are listed in Table 2.10.2. Table 2.10.2 Functions Revised from 7477 Group and 7478 Group RAM Sizes Port P4 Port P5 CNTR Pins Timer Noise Margin A-D Converter Package 2.10 Differences between 7480 and 7481 Group, and 7477 and 478 Group 7477 Group and 7478 Group M3747xM4 ..................................... 192 bytes M3747xM8/E8 ............................... 384 bytes • I/O port • CMOS outputs • In input mode, pull-up transistors connectable. • Input port • Pull-up transistors connectable • P50, P51 serve as input pins for clock generator. Note: The 7477 Group does not have port P5. CNTR0 and CNTR1 pins have the alternative functions of P32 and P33. Four 8-bit timers VIL: 0.25 VCC (Max.) VIH: 0.7 VCC (Min.) No VREF-off circuit The M37478Mx/E8-XXXFP and M37478MxT/ E8T-XXXFP packaged in 56P6N-A packages. 7480 Group and 7481 Group M3748xM4 ........................................ 256 bytes M3748xM8/E8 .................................. 448 bytes • I/O port • N-channel open-drain outputs • Built-in clamping diodes • In input mode, P40–P43, P50–P53 pins have schmidt circuits. Note: The 7480 Group does not have P42, P43, and P50–P53 pins. The 7480 Group and 7481 Group do not have the clock generator for timers. CNTR0 and CNTR1 pins have the alternative functions of P40 and P41. Two 8-bit timers Two 16-bit timers On port P3, P4, and P5 only. VIL: 0.4 VCC (Max.) VIH: 0.8 VCC (Min.) (at VCC = 4.5 V to 5.5 V) To connect/not to connect between VREF and ladder resistors is selectable with a VREF-off circuit. The M37481Mx/E8-XXXFP and M37481MxT/ E8T-XXXFP are packaged in 44P6N-A packages. |
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