ST7787 datasheet(28/217 Pages) SITRONIX

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ST7787

V1.7

2008.04.18

Output offset voltage

VOFSET

Note 6

Step-up circuit

Internal reference

voltage

VREF

Note 3

1st step-up (VDDx2)

voltage

AVDD

4.95

6.0

Note 3

1st step-up (VDDx2) drop

voltage

VDDx2,dorp

I AVDD = 2.5mA

(include panel

loading)

Note 3

Linear range

VLinear

0.2

AVDD-0.2

Note 1: VDDI=1.65 to 3.3V, VDD=2.45 to 3.3V, AGND=DGND=0V, Ta=-30 to 70 ℃

Note 2, 3, 4: When the measurements are performed with LCD module, measured points are like below.

Note 3: P68, CSX, RDX, WRX, D[17:0], D/CX, RESX, TE, PCLK, VS, HS, EXTC, GS, IDM, SCL, LCM[1:0], RCM[1:0],

IM[2:0], SRGB, SMX, SMY, REV, SHUT, RL, TB and Test pins

Note 5, Source channel loading= 2.2kohm , 10pF/channel, Gate channel loading=0.8kohm , 50pF/channel.

Note 6, The Max. value is between measured point of note 4 and gamma setting value.

Fig. 7.5.1 Example of measured point on the panel

Fig. 7.5.2 Tr: the source output stabling time.

Fig. 7.5.3 Source output deviation (channel to channel).

-When Sout >=4.2V, Sout<=0.8V

Max (S1, S2, S3, …. , S720) – Min (S1, S2, S3, …. , S720) <= 20mV

-When 4.2V>Sout>0.8V

Max (S1, S2, S3, …. , S720) – Min (S1, S2, S3, …. , S720) <= 6mV

-Example

When Sout level is 3.95V (Gray scale voltage)

Max (S1, S2, S3, …. , S720) = 3.96V

Min (S1, S2, S3, … , S720) = 3.944V

Sout deviation =Max (S1, S2, S3, …. , S720) – Min (S1, S2, S3, …. , S720) = 10mV <- Out of Spec

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