ST7787 datasheet(42/217 Pages) SITRONIX

42 / 217 page

ST7787

V1.7

2008.04.18

9.5 Data Transfer Break and Recovery

If there is a break in data transmission by RESX pulse, while transferring a Command or Frame Memory Data or Multiple

Parameter command Data, before Bit D0 of the byte has been completed, then DRIVER will reject the previous bits and

have reset the interface such that it will be ready to receive command data again when the chip select line (CSX) is next

activated after RESX have been High state. See the following example

Fig. 9.5.1 Serial bus protocol, write mode – interrupted by RESX

If there is a break in data transmission by CSX pulse, while transferring a Command or Frame Memory Data or Multiple

Parameter command Data, before Bit D0 of the byte has been completed, then DRIVER will reject the previous bits and

have reset the interface such that it will be ready to receive the same byte re-transmitted when the chip select line (CSX) is

next activated. See the following example

Fig. 9.5.2 Serial bus protocol, write mode – interrupted by CSX

If 1, 2 or more parameter command is being sent and a break occurs while sending any parameter before the last one and if

the host then sends a new command rather than re-transmitting the parameter that was interrupted, then the parameters

that were successfully sent are stored and the parameter where the break occurred is rejected. The interface is ready to

receive next byte as shown below.

Fig.9.5.3 Write interrupts recovery (serial interface)

If a 2 or more parameter command is being sent and a break occurs by the other command before the last one is sent, then

the parameters that were successfully sent are stored and the other parameter of that command remains previous value.

ST7787 Datasheet(PDF) 42 Page - Sitronix Technology Co., Ltd.