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ST7787 Datasheet(PDF) 38 Page - Sitronix Technology Co., Ltd. |
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ST7787 Datasheet(HTML) 38 Page - Sitronix Technology Co., Ltd. |
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38 / 217 page ![]() ST7787 V1.7 2008.04.18 34 Fig. 9.3.2 6800-series parallel bus protocol, write to register or display RAM 9.3.2 Read cycle sequence The write cycle means that the host reads information (command or/and data) to the display via the interface. Each read cycle (E low-high-low sequence) consists of 3 control (D/CX, E, R/WX) and data signals (D[17:0]). D/CX bit is a control signal, which tells if the data is a command or a data. The data signals are the command if the control signal is low (=’0’) and vice versa it is data (=’1’). Fig. 9.3.3 6800-series read protocol Note: E is an unsynchronized signal (It can be stopped) |
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