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ST7787 Datasheet(PDF) 72 Page - Sitronix Technology Co., Ltd. |
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ST7787 Datasheet(HTML) 72 Page - Sitronix Technology Co., Ltd. |
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72 / 217 page ![]() ST7787 V1.7 2008.04.18 72 Table 9.9.6.3 Vertical and Horizontal Timing for RGB I/F Specification Item Symbol Condition Min Type. Max Unit Vertical Timing Vertical cycle period TVP 323 324 HS Vertical low pulse width TVS 1 4 HS Vertical front porch TVFP 1 1 1023 HS Vertical back porch TVBP 1 1023 HS Vertical data start line TVS + TVBP 2 3 1023 HS Vertical blanking period TVBL TVS + TVBP + TVFP 3 4 1023 HS Vertical active area TVDISP 320 HS Vertical refresh rate TVRR Frame rate 61.75 65 68.25 Hz Horizontal Timing Horizontal cycle period THP 243 260 511 PCLK Horizontal low pulse width THS 1 63 PCLK Horizontal front porch THFP 1 63 PCLK Horizontal back porch THBP 1 63 PCLK THS + THBP 1 10 63 PCLK Horizontal data start point ff HS + fHBP 0.196 us Horizontal blanking period THBL 3 20 256 PCLK Horizontal active area THDISP 240 PCLK TPCLKCYC 33.3 182 196 ns Pixel clock cycle fPCLKCYC TVRR=65Hz 5.1 5.48 30 MHz Note 1. VDDI=1.65 to 3.3V, VDD=2.45 to 3.3V, AGND=DGND=0V, Ta=-30 to 70℃ (to +85℃ no damage) Note 2. Data lines can be set to “High” or “Low” during blanking time – Don’t care. Note 3. HP is multiples of eight PCLK. |
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