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ST7787 Datasheet(PDF) 69 Page - Sitronix Technology Co., Ltd. |
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ST7787 Datasheet(HTML) 69 Page - Sitronix Technology Co., Ltd. |
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69 / 217 page ![]() ST7787 V1.7 2008.04.18 69 Table 9.9.6.2 Vertical and Horizontal Timing for RGB I/F Specification Item Symbol Condition Min Typ. Max Unit Vertical Timing Vertical cycle period TVP 326 330 HS Vertical low pulse width TVS 2 4 HS Vertical front porch TVFP 2 4 HS Vertical back porch TVBP 2 4 HS Vertical data start line TVS + TVBP 4 8 HS Vertical blanking period TVBL TVS + TVBP + TVFP 6 10 HS Vertical active area TVDISP 320 HS Vertical refresh rate TVRR Frame rate 61.75 65 68.25 Hz Horizontal Timing Horizontal cycle period THP 272 512 PCLK Horizontal low pulse width THS 2 256 PCLK Horizontal front porch THFP 2 256 PCLK Horizontal back porch THBP 2 256 PCLK THS + THBP 30 256 PCLK Horizontal data start point ff HS + fHBP 1.0 us Horizontal blanking period THBL 32 256 PCLK Horizontal active area THDISP 240 PCLK TPCLKCYC 33.3 174 ns Pixel clock cycle fPCLKCYC TVRR=65Hz 5.8 30.0 MHz Note 1. VDDI=1.65 to 3.3V, VDD=2.45 to 3.3V, AGND=DGND=0V, Ta=-30 to 70℃ (to +85℃ no damage) Note 2. Data lines can be set to “High” or “Low” during blanking time – Don’t care. Note 3. HP is multiples of eight PCLK. |
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