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AM3894

AM3892

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SPRS681A – OCTOBER 2010 – REVISED MARCH 2011

2. The RESET pin must be asserted (low) for a minimum of 32 DEV_MXI cycles. Within the low period of

the RESET pin, the following happens:

(a) All pins, except test and emulation pins, enter a Hi-Z mode.

(b) The PRCM asserts reset to all modules within the device, except for the ARM Cortex-A8 interrupt

controller, test, and emulation.

3. The RESET pin may now be de-asserted (driven high). When the RESET pin is de-asserted (high):

(a) The BOOT pins are latched.

(b) Reset to the ARM Cortex-A8 and modules without a local processor is de-asserted, with the

exception of the ARM Cortex-A8 interrupt controller, test, and emulation.

(d) The clock, reset, and power-down state of each peripheral is determined by the default settings of

the PRCM.

(e) The ARM Cortex-A8 begins executing from the default address (Boot ROM).

(f) Since the ARM Cortex-A8 interrupt controller is not impacted by warm reset, application software

needs to explicitly clear all pending interrupts in the ARM Cortex-A8 interrupt controller.

7.2.4

Emulation Warm Reset

An emulation warm reset is activated by the on-chip emulation module. It has the same effect and

requirements as an external warm reset (RESET), with the exception that it does not re-latch the BOOT

pins.

The emulator initiates an emulation warm reset via the ICEPick module. To invoke the emulation warm

reset via the ICEPick module, the user can perform the following from the Code Composer Studio™ IDE

menu:

Debug

→ Advanced Resets → System Reset.

7.2.5

Watchdog Reset

A watchdog reset is initiated when the watchdog timer counter reaches zero. It has the same effect and

requirements as an external warm reset (RESET), with the exception that it does not re-latch the BOOT

pins. In addition, a watchdog reset always results in RSTOUT being asserted.

7.2.6

Software Global Cold Reset

A software global cold reset is initiated under software control. It has the same effect and requirements as

a power-on reset (POR), with the exception that it does not re-latch the BOOT pins.

Software initiates a software global cold reset by writing to RST_GLOBAL_COLD_SW in the

PRM_RST_CTRL register.

7.2.7

Software Global Warm Reset

A software global warm reset is initiated under software control. It has the same effect and requirements

as a external warm reset (RESET), with the exception that it does not re-latch the BOOT pins.

Software initiates a software global warm reset by writing to RST_GLOBAL_WARM_SW in the

PRM_RST_CTRL register.

7.2.8

Test Reset (TRST pin)

A test reset is activated by the emulator asserting the TRST pin. The only effect of a test reset is to reset

the emulation logic.

Power, Reset, Clocking, and Interrupts

127

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