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DAC3482 Datasheet(PDF) 23 Page - Texas Instruments |
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DAC3482 Datasheet(HTML) 23 Page - Texas Instruments |
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23 / 79 page ![]() rwb A6 A5 A4 A3 A2 A1 A0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 t S(SDENB) t H(SDIO) t S(SDIO) SDENB SCLK SDIO SDENB SCLK SDIO Instruction Cycle Data Transfer Cycle T0521-01 t (SCLK) DAC3482 www.ti.com SLAS748A – MARCH 2011 – REVISED JUNE 2011 Figure 47 shows the serial interface timing diagram for a DAC3482 write operation. SCLK is the serial interface clock input to DAC3482. Serial data enable SDENB is an active low input to DAC3482. SDIO is serial data in. Input data to DAC3482 is clocked on the rising edges of SCLK. Figure 47. Serial Interface Write Timing Diagram Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 23 Product Folder Link(s): DAC3482 |
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