DAC3482 datasheet(35/79 Pages) TI1

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DAC3482

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SLAS748A

– MARCH 2011 – REVISED JUNE 2011

– Address: 0x19, Default: 0x0440

Default

Address

Bit

Name

Function

Value

Name

config25

0x19

15:8

pll_m(7:0)

M portion of the M/N divider of the PLL.

00000100

If pll_m

<7> = 0, the M divider value has the range of pll_m<6:0>, spanning from

4 to 127. (i.e. 0, 1, 2, and 3 are not valid.)

If pll_m

<7> = 1, the M divider value has the range of 2 × pll_m<6:0>, spanning

from 8 to 254. (i.e. 0, 2, 4, and 6 are not valid. M divider has even values only.)

7:4

pll_n(3:0)

N portion of the M/N divider of the PLL.

0100

MM 0000: 1

MM 0001: 2

MM 0010: 3

MM 0011: 4

MM 0100: 5

MM 0101: 6

MM 0110: 7

MM 0111: 8

MM 1000: 9

MM 1001: 10

MM 1010: 11

MM 1011: 12

MM 1100: 13

MM 1101: 14

MM 1110: 15

MM 1111: 16

3:2

pll_vcoitune(1:0)

PLL VCO bias tuning bits. Set to "01" for normal PLL operation.

1:0

Reserved

Reserved for factory use.

– Address: 0x1A, Default: 0x0020

Default

Address

Bit

Name

Function

Value

Name

config26

0x1A

15:10

pll_vco(6:0)

VCO frequency coarse tuning bits.

000000

Reserved

Reserved for factory use.

Reserved

Reserved for factory use.

bias_sleep

When set, the bias amplifier is put into sleep mode.

tsense_sleep

Turns off the temperature sensor when asserted.

pll_sleep

When set, the PLL is put into sleep mode.

clkrecv_sleep

When asserted the clock input receiver gets put into sleep mode. This affects the

OSTR receiver as well.

Reserved

Reserved for factory use.

Reserved

Reserved for factory use.

Reserved

Reserved for factory use.

Reserved

Reserved for factory use.

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