DAC3482 datasheet(28/79 Pages) TI1

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DAC3482

SLAS748A

– MARCH 2011 – REVISED JUNE 2011

www.ti.com

– Address: 0x01, Default: 0x050E

Default

Address

Bit

Name

Function

Name

Value

config1

0x01

iotest_ena

When set, enables the data pattern checker test. The outputs are

deactivated regardless of the state of TXENABLE and

sif_txenable.

Reserved

Reserved for factory use.

Reserved

Reserved for factory use.

64cnt_ena

When set, enables resetting of the alarms after 64 good samples

with the goal of removing unnecessary errors. For instance, when

checking setup/hold through the pattern checker test, there may

initially be errors. Setting this bit removes the need for a SIF write to

clear the alarm register.

oddeven_parity

Selects between odd and even parity check

MM 0: Even parity

MM 1: Odd parity

word_parity_ena

When set, enables parity checking of each input word using the

PARITYP/N parity input. It should match the oddeven_parity

frame_parity_ena

When set, enables parity checking using the FRAME signal to

source the parity bit.

Reserved

Reserved for factory use.

Note: Default value is

‘1’. Must be set to ‘0’ for proper operation

Reserved

Reserved for factory use.

dacI_complement

When set, the DACI output is complemented. This allows to

effectively change the + and

– designations of the LVDS data lines.

dacQ_complement

When set, the DACQ output is complemented. This allows to

effectively change the + and

– designations of the LVDS data lines.

Reserved

Reserved for factory use.

alarm_2away_ena

When set, the alarm from the FIFO indicating the write and read

pointers being 2 away is enabled.

alarm_1away_ena

When set, the alarm from the FIFO indicating the write and read

pointers being 1 away is enabled.

alarm_collision_ena

When set, the alarm from the FIFO indicating a collision between the

write and read pointers is enabled.

Reserved

Reserved for factory use.

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