OR3C80 datasheet(147/210 Pages) AGERE

147 / 210 page

Lucent Technologies Inc.

147

Data Sheet

June 1999

ORCA Series 3C and 3T FPGAs

Estimating Power Dissipation (continued)

OR3Txxx (Preliminary Information)

The total operating power dissipated is estimated by

summing the standby (IDDSB), internal, and external

power dissipated. The internal and external power is

the power consumed in the PLCs and PICs, respec-

tively. In general, the standby power is small and may

be neglected. The total operating power is as follows:

PT =

Σ PPLC + Σ PPIC

The internal operating power is made up of two parts:

clock generation and PFU output power. The PFU out-

put power can be estimated based upon the number of

PFU outputs switching when driving an average fan-out

of two:

PPFU = 0.068 mW/MHz

For each PFU output that switches, 0.068 mW/MHz

needs to be multiplied times the frequency (in MHz)

that the output switches. Generally, this can be esti-

mated by using one-half the clock rate, multiplied by

some activity factor; for example, 20%.

The power dissipated by the clock generation circuitry

is based upon four parts: the fixed clock power, the

power/clock branch row or column, the clock power dis-

sipated in each PFU that uses this particular clock, and

the power from the subset of those PFUs configured as

synchronous memory. Therefore, the clock power can

be calculated for the four parts using the following

equations.

OR3T20 Clock Power

P= [0.38 mW/MHz

+ (0.045 mW/MHz/Branch) (# Branches)

+ (0.015 mW/MHz/PFU) (# PFUs)

+ (0.004 mW/MHz/PIO (# PIOs)]

For a quick estimate, the worst-case (typical circuit)

OR3T20 clock power

≈ 2.92 mW/MHz.

OR3T30 Clock Power

P= [0.53 mW/MHz

+ (0.061 mW/MHz/Branch) (# Branches)

+ (0.015 mW/MHz/PFU) (# PFUs)

+ (0.004 mW/MHz/PIO (# PIOs)]

For a quick estimate, the worst-case (typical circuit)

OR3T30 clock power

≈ 3.98 mW/MHz.

OR3T55 Clock Power

P= [0.88 mW/MHz

+ (0.102 mW/MHz/Branch) (# Branches)

+ (0.015 mW/MHz/PFU) (# PFUs)

+ (0.004 mW/MHz/PIO (# PIOs)]

For a quick estimate, the worst-case (typical circuit)

OR3T55 clock power

≈ 6.58 mW/MHz.

OR3T80 Clock Power

P= [0.107 mW/MHz

+ (0.124 mW/MHz/Branch) (# Branches)

+ (0.015 mW/MHz/PFU) (# PFUs)

+ (0.004 mW/MHz/PIO (# PIOs)]

For a quick estimate, the worst-case (typical circuit)

OR3T80 clock power

≈ 9.47 mW/MHz.

OR3T125 Clock Power

P= [0.167 mW/MHz

+ (0.193 mW/MHz/Branch) (# Branches)

+ (0.015 mW/MHz/PFU) (# PFUs)

+ (0.004 mW/MHz/PIO (# PIOs)]

For a quick estimate, the worst-case (typical circuit)

OR3T125 clock power

≈ 15.44 mW/MHz.

The power dissipated in a PIC is the sum of the power

dissipated in the four PIOs in the PIC. This consists of

power dissipated by inputs and ac power dissipated by

outputs. The power dissipated in each PIO depends on

whether it is configured as an input, output, or input/

output. If a PIO is operating as an output, then there is

a power dissipation component for PIN, as well as

POUT. This is because the output feeds back to the

input.

The power dissipated by an input buffer (VIH = VDD –

0.3 V or higher) is estimated as:

PIN = 0.09 mW/MHz

The ac power dissipation from an output or bidirec-

tional is estimated by the following:

POUT = (CL + 8.8 pF) x VDD2 x F Watts

where the unit for CL is farads, and the unit for F is Hz.

OR3C80 Datasheet(PDF) 147 Page - Agere Systems

OR3C80 Datasheet(HTML) 147 Page - Agere Systems

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL