MCP3911 datasheet(38/72 Pages) MICROCHIP

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MCP3911

DS22286A-page 38

5.7

Voltage Reference

5.7.1

INTERNAL VOLTAGE REFERENCE

The MCP3911 contains an internal voltage reference

source specially designed to minimize drift over

temperature. In order to enable the internal voltage

reference, the VREFEXT bit in the configuration

VREF supplies reference voltage to both channels. The

typical value of this voltage reference is 1.2V ±2%. The

internal reference has a very low typical temperature

coefficient of ±7 ppm/°C, allowing the output to have

minimal variation with respect to temperature since

they are proportional to (1/VREF).

The noise of the internal voltage reference is low

enough not to significantly degrade the SNR of the

ADC if compared to a precision external low-noise

voltage reference. The output pin for the internal volt-

age reference is REFIN+/OUT.

If the voltage reference is only used as an internal

VREF, adding bypass capacitance on REFIN+/OUT is

not necessary for keeping ADC accuracy, but a minimal

0.1 µF ceramic capacitance can be connected to avoid

EMI/EMC susceptibility issues, due to the antenna cre-

ated by the REFIN+/OUT pin if left floating.

The bypass capacitors also help applications where the

voltage reference output is connected to other circuits.

In this case, additional buffering may be needed as the

output drive capability of this output is low.

Adding too much capacitance on the REFIN+/OUT pin

may slightly degrade the THD performance of the

ADCs.

5.7.2

DIFFERENTIAL EXTERNAL

VOLTAGE INPUTS

When the VREFEXT bit is high, the two reference pins

(REFIN+/OUT, REFIN-) become a differential voltage

reference input. The internal voltage reference circuit is

placed into shutdown and the switch connecting this

circuit to the reference voltage input of the ADC is

opened. The internal voltage reference circuit is placed

into shutdown and the switch connecting this circuit to

the reference voltage input of the ADC is opened. The

voltage at the REFIN+/OUT is noted VREF+ and the

voltage at the REFIN- pin is noted VREF-. The differen-

tial voltage input value is given by the following equa-

tion:

EQUATION 5-4:

The specified VREF range is from 1.1V to 1.3V. The

REFIN- pin voltage (VREF-) should be limited to ±0.1V,

with respect to AGND. Typically, for single-ended refer-

ence applications, the REFIN- pin should be directly

connected to AGND, with its own separate track to

avoid any spike due to switching noise.

TABLE 5-7:

OSR = 64 OUTPUT CODE EXAMPLES

ADC Output code (MSB First)

Hexadecimal

Decimal

20-bit resolution

01 11

1 111

1 1 1 1

0 0 0 0

0x7FFFF0

+ 524, 287

01 11

1 111

1 1 1 1

1 1 1 0

0 0 0 0

0x7FFFE0

+ 524, 286

00 00

0 000

0 0 0 0

0x000000

11 11

1 111

1 1 1 1

0 0 0 0

0xFFFFF0

-1

10 00

0 000

0 0 0 0

0 0 0 1

0 0 0 0

0x800010

- 524, 287

10 00

0 000

0 0 0 0

0x800000

- 524, 288

TABLE 5-8:

OSR = 32 OUTPUT CODE EXAMPLES

ADC Output code (MSB First)

Hexadecimal

Decimal

17-bit resolution

0111

1111

1 0 0 0

0 0 0 0

0x7FFF80

+ 65, 535

0111

1111

0 0 0 0

0x7FFF00

+ 65, 534

0000

0 0 0 0

0x000000

1111

1 0 0 0

0 0 0 0

0xFFFF80

-1

1000

0000

1 0 0 0

0 0 0 0

0x800080

- 65, 535

1000

0000

0 0 0 0

0x800000

- 65, 536

VREF=VREF+ - VREF-

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