MCP3911 datasheet(59/72 Pages) MICROCHIP

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DS22286A-page 59

MCP3911

7.6

CONFIG Register - Configuration

CONFIG

Name

Bits

Address

Cof

CONFIG

0x0C

R/W

R/W-0

R/W-1

R/W-0

PRE<1>

PRE<0>

OSR<2>

OSR<1>

OSR<0>

DITHER<1>

DITHER<0>

AZ_FREQ

bit 15

bit 8

R/W-0

U-0

R/W-0

R/W-1

U-0

RESET<1>

RESET<0>

SHUT-

DOWN<1>

SHUT-

DOWN<0>

—

VREFEXT

CLKEXT

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15:14

PRE<1:0> Analog Master Clock (AMCLK) Prescaler Value

= AMCLK = MCLK / 8

= AMCLK = MCLK / 4

= AMCLK = MCLK / 2

= AMCLK = MCLK (DEFAULT)

bit 13:11

OSR<2:0> Oversampling Ratio for Delta-Sigma A/D Conversion (ALL CHANNELS, fd / fS)

111

= 4096 (fd = 244 sps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

110

= 2048 (fd = 488 sps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

101

= 1024 (fd = 976 sps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

100

= 512 (fd = 1.953 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

011

= 256 (fd = 3.90625 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz) (DEFAULT)

010

= 128 (fd = 7.8125 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

001

= 64 (fd = 15.625 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

000

= 32 (fd = 31.25 ksps for MCLK = 4 MHz, fs = AMCLK = 1 MHz)

bit 10:9

DITHER<1:0> Control for dithering circuit for idle tones cancellation and improved THD

= Dithering ON, both channels, Strength = Maximum(MCP3901 Equivalent) - (DEFAULT)

= Dithering ON, both channels, Strength = Medium

= Dithering ON, both channels, Strength = Minimum

= Dithering turned OFF

bit 8

AZ_FREQ Auto-zero frequency setting

= Auto-zeroing algorithm running at higher speed

= Auto-zeroing algorithm running at lower speed (Default)

bit 7:6

RESET<1:0>: Reset mode setting for ADCs

= Both CH0 and CH1 ADC are in reset mode

= CH1 ADC in reset mode

= CH0 ADC in reset mode

= Neither ADC in reset mode(default)

bit 5:4

SHUTDOWN<1:0>: Shutdown mode setting for ADCs

= Both CH0 and CH1 ADC in Shutdown

= CH1 ADC in Shutdown

= CH0 ADC in Shutdown

= Neither Channel in Shutdown(default)

bit 3

Not implemented, read as 0

MCP3911 Datasheet(PDF) 59 Page - Microchip Technology

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