AMD-K6 datasheet(203/346 Pages) AMD

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Chapter 8

Cache Organization

185

20695H/0—March 1998

AMD-K6® Processor Data Sheet

Preliminary Information

Table 31. Cache States for Inquiries, Snoops, Invalidation, and Replacement

Type of Operation

Cache State

Before Operation

Memory Access

Cache State After Operation

MESI State

Writeback

Writethrough State

Inquire

Cycle

shared or

exclusive

–

INV=0

shared

writethrough

INV=1

invalid

modified

burst write

(writeback)

INV=0

shared

writethrough

INV=1

invalid

Internal

Snoop

shared or

exclusive

–

invalid

modified

burst write

(writeback)

FLUSH#

Signal

shared or

exclusive

–

invalid

modified

burst write

(writeback)

WBINVD

Instruction

shared or

exclusive

–

invalid

modified

burst write

(writeback)

INVD

Instruction

–

invalid

Cache-Line

Replacement

shared or

exclusive

–

See Table 30

modified

burst write

(writeback)

Notes:

All writebacks are 32-byte burst write cycles.

– Not applicable or none.

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