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ADAV802 Datasheet(PDF) 41 Page - Analog Devices |
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ADAV802 Datasheet(HTML) 41 Page - Analog Devices |
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41 / 53 page ![]() Preliminary Technical Data ADAV802 Rev. Pr G | Page 41 of 53 Table 61. Transmitter User Bit Buffer Data Register TxUBDATA07-TxUBDATA00 7,6,5,4,3,2,1,0 ADDRESS = 1010011 TxUBDATA07-00 A write to this register will write 8 bits of user data to the Transmit User bit buffer pointed to by TxUBADDR7-0. When User Bit autobuffering is enabled this buffer is disabled. Table 62. Q Subcode CRC Error Status Register (Read Only) RES RES RES RES RES RES QCRCERROR QSUB 7 6 5 4 3 2 1 0 ADDRESS = 1010100 QCRCERROR This bit will be set if the CRC check of the Q Subcode fails. This bit will remain high but will not generate an interrupt. This bit will be cleared once the register is read. QSUB This bit will be set if a Q subcode has been read into the Q subcode buffer Table 63. Q Subcode Buffe ADDRESS BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0 0x55 Address Address Address Address Control Control Control Control 0x56 Track Number Track Number Track Number Track Number Track Number Track Number Track Number Track Number 0x57 Index Index Index Index Index Index Index Index 0x58 Minute Minute Minute Minute Minute Minute Minute Minute 0x59 Second Second Second Second Second Second Second Second 0x5A Frame Frame Frame Frame Frame Frame Frame Frame 0x5B Zero Zero Zero Zero Zero Zero Zero Zero 0x5C Absolute Minute Absolute Minute Absolute Minute Absolute Minute Absolute Minute Absolute Minute Absolute Minute Absolute Minute 0x5D Absolute Second Absolute Second Absolute Second Absolute Second Absolute Second Absolute Second Absolute Second Absolute Second 0x5E Absolute Frame Absolute Frame Absolute Frame Absolute Frame Absolute Frame Absolute Frame Absolute Frame Absolute Frame |
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