ADAV802_15 datasheet(44/53 Pages) AD

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ADAV802

Preliminary Technical Data

Rev. Pr G | Page 44 of 53

Table 68. DAC Control Register 3

RES

ZFVOL

ZFDATA

ZFPOL

ADDRESS = 1100110

ZFVOL

DAC Zero Flag on Mute and Zero Volume

0 = Enabled

1 = Disabled

ZFDATA

DAC Zero Flag on Zero Data Disable

0 = Enabled

1 = Disabled

ZFPOL

DAC Zero Flag Polarity

0 = Active High

1 = Active Low

Table 69. DAC Control Register 4

RES

INTRPT

ZEROSEL1

ZEROSEL0

RES

ADDRESS = 1100111

INTRPT

This bit selects the functionality of the ZEROL/INT pin

0 = The pin functions as a ZEROL flag pin

1 = The pin functions as an interrupt pin

ZEROSEL1-0

These bits control the functionality of the ZEROR pin when the ZEROL/INT pin is used as an interrupt

00 = The pin functions as a ZEROR flag pin

01 = The pin functions as a ZEROL flag pin

10 = The pin is asserted when either the Left or Right channel is zero

10 = The pin is asserted when both the Left and Right channels are zero

Table 70. DAC Left Volume Register

DVOLL7

DVOLL6

DVOLL5

DVOLL4

DVOLL3

DVOLL2

DVOLL1

DVOLL0

ADDRESS = 1101000

DVOLL7-0

DAC Left Channel Volume Control

1111111 = 0dBFS

1111110 = -0.375dBFS

0000000 = -95.625dBFS

Table 71. DAC Right Volume Register

DVOLR7

DVOLR6

DVOLR5

DVOLR4

DVOLR3

DVOLR2

DVOLR1

DVOLR0

ADDRESS = 1101001

DVOLL7-0

DAC Right Channel Volume Control

1111111 = 0dBFS

1111110 = -0.375dBFS

0000000 = -95.625dBFS

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