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AM3874 Datasheet(PDF) 292 Page - Texas Instruments |
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AM3874 Datasheet(HTML) 292 Page - Texas Instruments |
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292 / 361 page  DQ7 DQ0 DM/TQS DQS DQS DQ7 DQ0 DM/TQS DQS DQS CK DDR[x]_D[31] DDR[x]_D[24] 8-Bit DDR3 Devices 0.1 µF 50 2 (± %) 0.1 µF 0.1 µF 32-bit DDR3 EMIF DDR[x]_ODT[1] DDR[x]_CS[1] DDR[x]_DQM[3] DDR[x]_DQS[3] DDR[x]_DQS[3] DDR[x]_D[23] DDR[x]_D[16] DDR[x]_DQM[2] DDR[x]_DQS[2] DDR[x]_DQS[2] DDR[x]_D[15] DDR[x]_D[8] DDR[x]_DQM[1] DDR[x]_DQS[1] DDR[x]_DQS[1] DDR[x]_D[7] DDR[x]_D[0] DDR[x]_DQM[0] DDR[x]_DQS[0] DDR[x]_DQS[0] DDR[x]_CLK DDR[x]_CLK DDR[x]_ODT[0] DDR[x]_CS[0] DDR[x]_BA[0] DDR[x]_BA[1] DDR[x]_BA[2] DDR[x]_A[0] DDR[x]_A[14] DDR[x]_CAS DDR[x]_RAS DDR[x]_WE DDR[x]_CKE DDR[x]_RST VREFSSTL_DDR[x] DDR[x]_VTP NC NC 8 8 8 8 15 CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ CK CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA Termination is required. See terminator comments. Zo Value determined according to the DDR memory device data sheet. ZQ DQ7 DQ0 DM/TQS DQS DQS CK DQ7 DM/TQS DQS DQS 8-Bit DDR3 Devices 0.1 µF 0.1 µF DQ0 CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA CK CK ODT BA1 BA0 BA2 CS A0 A14 CAS RAS WE RST CKE ZQ VREFDQ VREFCA ZQ Zo Zo Zo Zo DDR_VREF DDR_VTT DDR_1V5 ZQ ZQ TDQS NC NC TDQS TDQS NC TDQS NC 0.1 µF AM3874, AM3871 SPRS695C – SEPTEMBER 2011 – REVISED DECEMBER 2013 www.ti.com Figure 8-55. 32-Bit, One-Bank DDR3 Interface Schematic Using Four 8-Bit DDR3 Devices 292 Peripheral Information and Timings Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: AM3874 AM3871 |
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