PEB2256HT datasheet(337/490 Pages) INFINEON

Part #	PEB2256HT

Description	E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications

PDF	490 Pages

Scroll/Zoom	100%

Manufacturer	INFINEON [Infineon Technologies AG]

Direct Link	http://www.infineon.com

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337 / 490 page

FALC56 V1.2

PEB 2256

T1/J1 Registers

Data Sheet

337

2002-08-27

Receive Address Byte High Register 1 (Read/Write)

Value after reset: FD

In operating modes that provide high byte address recognition, the high byte of the

received address is compared to the individually programmable values in RAH1 and

RAH2.

The address registers are used by all HDLC channels in common.

RAH1

Value of the First Individual High Address Byte

Bit 1 (C/R-bit) is excluded from address comparison.

Receive Address Byte High Register 2 (Read/Write)

Value after reset: FF

RAH2

Value of Second Individual High Address Byte

Receive Address Byte Low Register 1 (Read/Write)

Value after reset: FF

RAL1

Value of First Individual Low Address Byte

Receive Address Byte Low Register 2 (Read/Write)

Value after reset: FF

RAL2

Value of the second individually programmable low address

byte.

RAH1

(04)

RAH2

(05)

RAL1

(06)

RAL2

(07)

PEB2256HT Datasheet(PDF) 337 Page - Infineon Technologies AG