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Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
108
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
Multiply Input X Register (MUL_X, Address = Bank 0, E8h)
Multiply Input Y Register (MUL_Y, Address = Bank 0, E9h)
Figure 28: Multiply/Accumulate Block Diagram
Table 82:
Multiply Input X Register
Bit #
7
6
5
4
3
2
1
0
POR
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
: Data [7:0] 8-bit data is the input value for X multiplier
Table 83:
Multiply Input Y Register
Bit #
7
6
5
4
3
2
1
0
POR
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Bit Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
: Data [7:0] 8-bit data is the input value for Y multiplier
MULTIPLIER
Z out, 16 BIT
32-BIT
ACCUMULATOR
32-BIT ACC
16 BIT
To
Internal
System
Bus
MUL_Y or MAC_Y
MUL_X or MAC_X
A CC_DR0
A CC_DR1
A CC_DR2
A CC_DR3
MUL_DL
MUL_DH
MAC_CL0
MAC_CL1
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