DC and AC Characteristics
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
139
13.3.2
AC Analog Output Buffer Specifications
The following table lists guaranteed maximum and mini-
mum specifications for the voltage and temperature
ranges, 5V +/- 5% and –40°C <= TA <= 85°C. Typical
parameters are provided for design guidance only. Typi-
cal parameters apply to 5V and 25°C. For 3.3V opera-
tion, see Table 119 on page 139.
Table 118:
5V AC Analog Output Buffer Specifications
Symbol
5V AC Analog Output Buffer Specifications
Minimum
Typical
Maximum
Unit
Rising Settling Time to 0.1%, 1V Step, 100pF Load
Bias = Low
Bias = High
-
-
-
-
2.5
2.5
µS
µS
Falling Settling Time to 0.1%, 1V Step, 100pF Load
Bias = Low
Bias = High
-
-
-
-
2.2
2.2
µS
µS
Rising Slew Rate (20% to 80%), 1V Step, 100pF Load
Bias = Low
Bias = High
.9
.9
-
-
-
-
V/µS
V/µS
Falling Slew Rate (80% to 20%), 1V Step, 100pF Load
Bias = Low
Bias = High
.9
.9
-
-
-
-
V/µS
V/µS
Small Signal Bandwidth, 20mVpp, 3dB BW, 100pF Load
Bias = Low
Bias = High
1.5
1.5
-
-
-
-
MHz
MHz
Large Signal Bandwidth, 1Vpp, 3dB BW, 100pF Load
Bias = Low
Bias = High
600
600
-
-
-
-
kHz
kHz
Table 119:
3.3V AC Analog Output Buffer Specifications
Symbol
3.3V AC Analog Output Buffer Specifications
Minimum
Typical
Maximum
Unit
Rising Settling Time to 0.1%, 1V Step, 100pF Load
Bias = Low
Bias = High
-
-
-
-
3.2
3.2
µS
µS
Falling Settling Time to 0.1%, 1V Step, 100pF Load
Bias = Low
Bias = High
-
-
-
-
2.6
2.6
µS
µS
Rising Slew Rate (20% to 80%), 1V Step, 100pF Load
Bias = Low
Bias = High
.5
.5
-
-
-
-
V/µS
V/µS
Falling Slew Rate (80% to 20%), 1V Step, 100pF Load
Bias = Low
Bias = High
.5
.5
-
-
-
-
V/µS
V/µS
Small Signal Bandwidth, 20mVpp, 3dB BW, 100pF Load
Bias = Low
Bias = High
1.3
1.3
-
-
-
-
MHz
MHz
Large Signal Bandwidth, 1Vpp, 3dB BW, 100pF Load
Bias = Low
Bias = High
360
360
-
-
-
-
kHz
kHz
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