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WM8998 Datasheet(PDF) 35 Page - Wolfson Microelectronics plc |
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WM8998 Datasheet(HTML) 35 Page - Wolfson Microelectronics plc |
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35 / 307 page ![]() Production Data WM8998 w PD, October 2014, Rev 4.0 35 CONTROL INTERFACE TIMING SCLK (input) SDA t4 t3 START t8 STOP t2 t1 t7 t6 t5 t9 t10 Figure 8 Control Interface Timing Test Conditions The following timing information is valid across the full range of recommended operating conditions. PARAMETER SYMBOL MIN TYP MAX UNIT SCLK Frequency 1000 kHz SCLK Low Pulse-Width t1 500 ns SCLK High Pulse-Width t2 260 ns Hold Time (Start Condition) t3 260 ns Setup Time (Start Condition) t4 260 ns SDA, SCLK Rise Time (20% to 80%) t6 120 ns SDA, SCLK Fall Time (80% to 20%) t7 120 ns Setup Time (Stop Condition) t8 260 ns SDA Setup Time (data input) t5 50 ns SDA Hold Time (data input) t9 0 ns SDA Valid Time (data/ACK output) t10 450 ns Pulse width of spikes that will be suppressed tps 0 50 ns |
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