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WM8998 Datasheet(PDF) 9 Page - Wolfson Microelectronics plc |
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WM8998 Datasheet(HTML) 9 Page - Wolfson Microelectronics plc |
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9 / 307 page ![]() Production Data WM8998 w PD, October 2014, Rev 4.0 9 PIN NO NAME TYPE DESCRIPTION F9 GPIO1 Digital Input / Output General Purpose pin GPIO1. The output configuration is selectable CMOS or Open Drain. H7 GPIO2 Digital Input / Output General Purpose pin GPIO2. The output configuration is selectable CMOS or Open Drain. G4 GPIO3 Digital Input / Output General Purpose pin GPIO3. The output configuration is selectable CMOS or Open Drain. G8 GPIO4 Digital Input / Output General Purpose pin GPIO4. The output configuration is selectable CMOS or Open Drain. E11 GPIO5 Digital Input / Output General Purpose pin GPIO5. The output configuration is selectable CMOS or Open Drain. D11 GPSWN Analogue Output General Purpose analogue switch contact (negative) D12 GPSWP Analogue Input General Purpose analogue switch contact (positive) B12 HPDETL Analogue Input Headphone left (HPOUTL) sense input A12 HPDETR Analogue Input Headphone right (HPOUTR) sense input A13 HPOUTFB1/ MICDET2 Analogue Input HPOUTL and HPOUTR ground feedback pin 1/ Microphone & accessory sense input 2 B8 HPOUTL Analogue Output Left headphone output A8 HPOUTR Analogue Output Right headphone output C1 IN1ALN/ DMICCLK1 Analogue Input / Digital Output Left channel negative differential Mic/Line input / Digital MIC clock output 1 C2 IN1ALP Analogue Input Left channel single-ended Mic/Line input / Left channel positive differential Mic/Line input C3 IN1ARN/ DMICDAT1 Analogue input / Digital Input Right channel negative differential Mic/Line input / Digital MIC data input 1 C4 IN1ARP Analogue Input Right channel single-ended Mic/Line input / Right channel positive differential Mic/Line input B1 IN2AN/ DMICCLK2 Analogue Input / Digital Output Negative differential Mic/Line input / Digital MIC clock output 2 B2 IN2AP/ DMICDAT2 Analogue Input / Digital Input Single-ended Mic/Line input / Positive differential Mic/Line input/ Digital MIC data input 2 D1 IN1BLN Analogue Input Left channel negative differential Mic/Line input D2 IN1BLP Analogue Input Left channel single-ended Mic/Line input / Left channel positive differential Mic/Line input D3 IN1BRN Analogue input Right channel negative differential Mic/Line input D4 IN1BRP Analogue Input Right channel single-ended Mic/Line input / Right channel positive differential Mic/Line input B3 IN2BN Analogue Input Negative differential Mic/Line input B4 IN2BP Analogue Input Single-ended Mic/Line input / Positive differential Mic/Line input F11 IRQ ¯¯¯ Digital Output Interrupt Request (IRQ) output (default is active low). The pin configuration is selectable CMOS or Open Drain. C8 JACKDET Analogue Input Jack detect input F13 LDOENA Digital Input Enable pin for LDO1 (generates DCVDD supply). Logic 1 input enables LDO1. If using external DCVDD supply, then LDO1 is not used, and LDOENA must be held at logic 0. E13 LDOVDD Supply Supply for LDO1 D13 LDOVOUT Analogue Output LDO1 output. If using external DCVDD, then LDOVOUT must be left floating. A6 LINEOUTFB Analogue Input LINEOUTL and LINEOUTR ground loop noise rejection feedback B6 LINEOUTL Analogue Output Left line output B5 LINEOUTR Analogue Output Right line output H12 MCLK1 Digital Input Master clock 1 F12 MCLK2 Digital Input Master clock 2 C7 MICBIAS1 Analogue Output Microphone bias 1 |
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