WM8998 datasheet(4/307 Pages) WOLFSON

4 / 307 page

WM8998

Production Data

PD, October 2014, Rev 4.0

PWM GENERATOR ................................................................................................................................................................. 85

SAMPLE RATE CONTROL ...................................................................................................................................................... 87

ASYNCHRONOUS SAMPLE RATE CONVERTER (ASRC) ..................................................................................................... 94

ISOCHRONOUS SAMPLE RATE CONVERTER (ISRC) .......................................................................................................... 97

DIGITAL AUDIO INTERFACE ..............................................................................................102

MASTER AND SLAVE MODE OPERATION........................................................................................................................... 103

AUDIO DATA FORMATS ....................................................................................................................................................... 103

AIF TIMESLOT CONFIGURATION......................................................................................................................................... 105

TDM OPERATION BETWEEN THREE OR MORE DEVICES ................................................................................................ 107

DIGITAL AUDIO INTERFACE CONTROL............................................................................109

AIF SAMPLE RATE CONTROL.............................................................................................................................................. 109

AIF MASTER / SLAVE CONTROL.......................................................................................................................................... 109

AIF SIGNAL PATH ENABLE................................................................................................................................................... 112

AIF BCLK AND LRCLK CONTROL......................................................................................................................................... 114

AIF DIGITAL AUDIO DATA CONTROL .................................................................................................................................. 118

AIF TDM AND TRI-STATE CONTROL ................................................................................................................................... 121

AIF DIGITAL PULL-UP AND PULL-DOWN............................................................................................................................. 122

SLIMBUS INTERFACE ........................................................................................................125

SLIMBUS DEVICES ............................................................................................................................................................... 125

SLIMBUS FRAME STRUCTURE............................................................................................................................................ 125

CONTROL SPACE................................................................................................................................................................. 125

DATA SPACE......................................................................................................................................................................... 126

SLIMBUS CONTROL SEQUENCES ....................................................................................127

DEVICE MANAGEMENT & CONFIGURATION ...................................................................................................................... 127

INFORMATION MANAGEMENT ............................................................................................................................................ 127

VALUE MANAGEMENT (INCLUDING REGISTER ACCESS) ................................................................................................ 128

FRAME & CLOCKING MANAGEMENT.................................................................................................................................. 128

DATA CHANNEL CONFIGURATION ..................................................................................................................................... 129

SLIMBUS INTERFACE CONTROL ......................................................................................130

SLIMBUS DEVICE PARAMETERS ........................................................................................................................................ 130

SLIMBUS MESSAGE SUPPORT ........................................................................................................................................... 130

SLIMBUS PORT NUMBER CONTROL................................................................................................................................... 133

SLIMBUS SAMPLE RATE CONTROL.................................................................................................................................... 133

SLIMBUS SIGNAL PATH ENABLE......................................................................................................................................... 134

SLIMBUS CONTROL REGISTER ACCESS ........................................................................................................................... 135

SLIMBUS CLOCKING CONTROL .......................................................................................................................................... 137

OUTPUT SIGNAL PATH ......................................................................................................139

OUTPUT SIGNAL PATH ENABLE.......................................................................................................................................... 141

OUTPUT SIGNAL PATH SAMPLE RATE CONTROL............................................................................................................. 143

OUTPUT SIGNAL PATH CONTROL ...................................................................................................................................... 144

OUTPUT SIGNAL PATH DIGITAL VOLUME CONTROL........................................................................................................ 145

OUTPUT SIGNAL PATH NOISE GATE CONTROL................................................................................................................ 150

OUTPUT SIGNAL PATH AEC LOOPBACK............................................................................................................................ 151

HEADPHONE/LINE/EARPIECE OUTPUTS AND MONO MODE............................................................................................ 153

SPEAKER OUTPUTS (ANALOGUE)...................................................................................................................................... 154

SPEAKER OUTPUTS (DIGITAL)............................................................................................................................................ 155

EXTERNAL ACCESSORY DETECTION..............................................................................157

JACK DETECT....................................................................................................................................................................... 157

JACK POP SUPPRESSION (MICDET CLAMP AND GP SWITCH) ........................................................................................ 159

MICROPHONE DETECT........................................................................................................................................................ 161

HEADPHONE DETECT.......................................................................................................................................................... 166

LOW POWER SLEEP CONFIGURATION............................................................................171

SLEEP MODE ........................................................................................................................................................................ 171

SLEEP CONTROL SIGNALS - JD1, GP5, MICDET CLAMP................................................................................................... 174

WAKE-UP TRANSITION ........................................................................................................................................................ 175

WRITE SEQUENCE CONTROL............................................................................................................................................. 176

WM8998 Datasheet(PDF) 4 Page - Wolfson Microelectronics plc

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