DP83953 datasheet(34/90 Pages) NSC

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4.0 Functional Description (Continued)

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Processor Access Cycles

Access to the RIC2A's on-chip registers is made via its pro-

cessor interface, which utilizes conventional non-multi-

plexed address (five bit) and data (eight bit) busses. Also,

the data bus provides data and address information to

external chip display latches during the display update

cycles. While performing these cycles, the RIC2A behaves

as a master of its data bus. Consequently a TRI-STATE bi-

directional bus transceiver, e.g. 74LS245, must be placed

between the RIC2A and any processor.

The RIC2A provides a scheme to facilitate faster register

access. The Lower Event Information Register (Page 1H,

Address 1FH) has a Disable LED Update bit (DLU). The

setting of this bit causes the RIC2A to stop LED updates.

This scheme “unshares” the data bus, holding the RIC2A in

slave access mode. This mode reduces the maximum

read/write cycle time to approximately 400 ns.

The processor requests a register access by asserting the

read “RD” or write “WR” input strobes. The RIC2A

responds by completing any current display update cycle

and asserts the TRI-STATE buffer enable signal “BUFEN”.

If the processor cycle is a write cycle then the RIC2A's data

buffers are disabled to prevent contention problems. In

order to interface to the RIC2A in a processor controlled

system, a PAL device may be used to perform the following

operations:

1. To locate the RIC2A in the processor's memory map (ad-

dress decode),

2. To generate the RIC2A's read and write strobes,

3. To control the direction signal for the 74LS245.

An example of the processor and display interfaces is

shown in Figure 13.

Interrupt Handling

The DP83953 RIC2A offers an alternative method for a

faster access to determine the source of the Event Logging

Interrupt (ELI) register than the DP83950 RIC.

For an event logging interrupt due to flag found, the

DP83950 RIC requires the following scheme:

1. Read the Page Select Register (Address 10H) to locate

the source of Event Logging Interrupt.

2. Read all the Port Event Recording Registers (Page 1H,

Address 11H to 1DH) to find the port and the event re-

sponsible for Event Logging Interrupt.

The DP83953 RIC2A allows the following alternate

scheme for a faster access:

1. Read Page Select Register (Address 10H) to locate the

source of Event Logging Interrupt.

2. Read the Event Information Registers (Page 1H, ad-

dresses 1EH and 1FH) to locate the port responsible for

interrupt.

3. Read the Event Recording register of that port to find

which specific event caused the Event Logging Interrupt.

DP83953 Datasheet(PDF) 34 Page - National Semiconductor (TI)

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