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DP83953 Datasheet(PDF) 41 Page - National Semiconductor (TI) |
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DP83953 Datasheet(HTML) 41 Page - National Semiconductor (TI) |
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41 / 90 page ![]() 41 www.national.com 5.0 HUB MANAGEMENT SUPPORT (Continued) Packet Status Register 0 Packet Status Register 1 D7 D6 D5 D4 D3 D2 D1 D0 A5 A4 A3 A2 A1 A0 PCOMPD resv Bit Symbol Description D0 resv Reserved for future use: This bit is currently undefined. Management software should not examine the state of this bit. D1 PCOMPD Packet Compression Done: If packet compression is utilized, this bit informs the user that compression was performed, i.e., the packet was long enough to require compression. D(7:2) A(5:0) RIC2A Address (5:0): This address is defined by the user and is supplied when writing to the RIC2A Address Register. It is used by hub management software to distinguish between RIC2As in a multi-RIC2A system. D7 D6 D5 D4 D3 D2 D1 D0 CRCER FAE COL CLN PA3 PA2 PA1 PA0 Bit Symbol Description D(3:0) PA(3:0) Port Address: This field defines the port which is receiving the packet. D4 CLN Clean Receive: This bit is asserted provided no collision activity occurs during repetition of the source and destination address fields, and the packet is of sufficient size to contain these fields. D5 COL Collision: If a receive or transmit collision occurs during packet repetition the collision bit is asserted. D6 FAE Frame Alignment Error: This bit is asserted if a Frame Alignment Error occurred in the repeated packet. D7 CRER CRC Error: This bit is asserted if a CRC Error occurred in the repeated packet. This status flag should not be tested if the COL bit is asserted since the error may be simply due to the collision. |
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