PM8313 datasheet(22/192 Pages) PMC

22 / 192 page

PM8313 D3MX

DATA SHEET

PMC-920702

ISSUE 5

M13 MULTIPLEXER

inputs allow substitution of the overhead bits or the sourcing of AIS, idle signal or

far end receive failure indication.

When configured for the C-bit parity application, bit oriented codes in the FEAC

channel are inserted by the XBOC Bit-Oriented Code Transmitter Block. The

FEAC code is controlled by an internal register. The path maintenance data link

is inserted using the XFDL Data Link Transmitter Block or an external HDLC

transmitter. The XFDL supports polled, interrupt driven, and DMA servicing.

The demultiplexing and multiplexing of seven 6312 kbit/s data streams into and

out of the DS3 is performed by the MX23 M23 Multiplexer Block. The MX23

contains FIFOs and performs bit stuffing for the rate adaptation of the DS2s. The

C-bits are set appropriately, with the option of inserting DS2 loopback requests.

The MX23 may be configured to generate an interrupt upon the detection of

loopback requests in the received DS3. AIS may be inserted in the any of the

6312 kbit/s tributaries in both directions. C-bit parity is supported by sourcing a

6.3062723 MHz clock, which corresponds to a stuffing ratio of 100%.

Framing to the demultiplexed 6312 kbit/s data streams is provided by the DS2

FRMR Framer. It supports both DS2 (ANSI TI.107) and CCITT Recommendation

G.747 frame formats. The maximum average reframe time is 7 ms for DS2 and

1ms for G.747. In DS2 mode, it detects far end receive failure and accumulates

M-bit and F-bit errors. In G.747 mode, it detects remote alarm and accumulates

framing word errors and parity errors. The DS2 FRMR is an off-line framer,

indication both OOF and COFA events. Error events (FERF, MERR, FERR,

PERR, RAI, framing word errors) are still indicated while the DS2 framer is

indicating OOF, based on the previous alignment.

The multiplexing and demultiplexing of the low speed tributaries into and out of a

6312 kbit/s data stream is performed by seven MX12 M12 Multiplexers. Each of

the MX12 blocks may be independently configured to multiplex and demultiplex

four 1544 kbit/s DS1s into and out of a DS2 formatted signal or to multiplex and

demultiplex three 2048 kbit/s signals into and out of a G.747 formatted signal.

Each MX12 may be independently bypassed so an external DS2 may by

multiplexed and demultiplexed directly into and out of the DS3. The MX12

contains FIFOs and performs bit stuffing to accommodate the tributary frequency

deviations. The C-bits are set appropriately, with the option of inserting DS1

loopback requests. The MX12 block may be configured to generate an interrupt

upon the detection of loopback requests in the received DS2. AIS may be

inserted in any of the low speed tributaries in both directions.

PM8313 Datasheet(PDF) 22 Page - PMC-Sierra, Inc