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PM8313 Datasheet(PDF) 35 Page - PMC-Sierra, Inc |
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PM8313 Datasheet(HTML) 35 Page - PMC-Sierra, Inc |
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35 / 192 page  PM8313 D3MX DATA SHEET PMC-920702 ISSUE 5 M13 MULTIPLEXER 25 Pin Name Type Pin No. Function GD2CLK Output 6 The transmit generated DS2 clock (GD2CLK) signal is provided for use in integrated M13 or C-bit parity multiplex applications. When configured for M13 operation, GD2CLK is nominally a 6.311993 MHz clock, which corresponds to a stuffing ratio of 39.1%. When configured for C-bit parity operation, GD2CLK is nominally a 6.3062723 MHz clock, which corresponds to a stuffing ratio of 100%. The GD2CLK may be connected to the TD2CLK input clock. GD2CLK is updated on the falling edge of TCLK. TD2CLK Input 206 The transmit DS2 clock (TD2CLK) signal provides timing for the multiplex side of all of the MX12 TSBs. TD2CLK is nominally a 6.312 MHz, 50% duty cycle clock. |
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